Module Name: src
Committed By: cliff
Date: Fri Sep 25 22:20:43 UTC 2009
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlreg.h
Log Message:
define some fields for reserved register bits
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixlreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlreg.h
diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.2 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.3
--- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.2 Tue Sep 15 02:34:34 2009
+++ src/sys/arch/mips/rmi/rmixlreg.h Fri Sep 25 22:20:43 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlreg.h,v 1.1.2.2 2009/09/15 02:34:34 cliff Exp $ */
+/* $NetBSD: rmixlreg.h,v 1.1.2.3 2009/09/25 22:20:43 cliff Exp $ */
/*-
* Copyright (c) 2009 The NetBSD Foundation, Inc.
@@ -202,6 +202,8 @@
#define RMIXL_PIC_CONTROL_TIMER_ENB __BITS(15,8) /* per-Timer enable bits */
#define RMIXL_PIC_CONTROL_TIMER_ENBn(n) ((1 << (n)) & RMIXL_PIC_CONTROL_TIMER_ENB)
#define RMIXL_PIC_CONTROL_RESb __BITS(31,16)
+#define RMIXL_PIC_CONTROL_RESV \
+ (RMIXL_PIC_CONTROL_RESa|RMIXL_PIC_CONTROL_RESb)
/*
* RMIXL_PIC_IPIBASE bits
@@ -211,10 +213,13 @@
#define RMIXL_PIC_IPIBASE_BCAST __BIT(7)
#define RMIXL_PIC_IPIBASE_NMI __BIT(8)
#define RMIXL_PIC_IPIBASE_ID __BITS(31,16)
-#define RMIXL_PIC_IPIBASE_ID_RESa __BITS(31,23)
+#define RMIXL_PIC_IPIBASE_ID_RESb __BITS(31,23)
#define RMIXL_PIC_IPIBASE_ID_CPU __BITS(22,20) /* Physical CPU ID */
-#define RMIXL_PIC_IPIBASE_ID_RESb __BITS(19,18)
+#define RMIXL_PIC_IPIBASE_ID_RESc __BITS(19,18)
#define RMIXL_PIC_IPIBASE_ID_THREAD __BITS(22,20) /* Thread ID */
+#define RMIXL_PIC_IPIBASE_ID_RESV \
+ (RMIXL_PIC_IPIBASE_ID_RESa|RMIXL_PIC_IPIBASE_ID_RESb \
+ |RMIXL_PIC_IPIBASE_ID_RESc)
/*
* RMIXL_PIC_IRTENTRYC0 bits
