Module Name:    src
Committed By:   cliff
Date:           Sat May  1 06:13:34 UTC 2010

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c

Log Message:
in evbmips_iointr() for RMI, where we ack the EIRR,
replace (relatively expensive) splhigh()/splx()
protection with (more efficient) EIMR-based disable/restore.


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/rmi/rmixl_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.17 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.18
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.17	Mon Apr 12 22:40:55 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c	Sat May  1 06:13:34 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: rmixl_intr.c,v 1.1.2.17 2010/04/12 22:40:55 cliff Exp $	*/
+/*	$NetBSD: rmixl_intr.c,v 1.1.2.18 2010/05/01 06:13:34 cliff Exp $	*/
 
 /*-
  * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rmixl_intr.c,v 1.1.2.17 2010/04/12 22:40:55 cliff Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rmixl_intr.c,v 1.1.2.18 2010/05/01 06:13:34 cliff Exp $");
 
 #include "opt_ddb.h"
 #define	__INTR_PRIVATE
@@ -813,13 +813,13 @@
 	for (;;) {
 		rmixl_intrhand_t *ih;
 		uint64_t eirr;
+		uint64_t eimr;
 		uint64_t vecbit;
 		int vec;
 
 		asm volatile("dmfc0 %0, $9, 6;" : "=r"(eirr));
 
 #ifdef IOINTR_DEBUG
-		uint64_t eimr;
 		asm volatile("dmfc0 %0, $9, 7;" : "=r"(eimr));
 		printf("%s: eirr %#"PRIx64", eimr %#"PRIx64", mask %#"PRIx64"\n",
 			__func__, eirr, eimr, ipl_eimr_map[ipl-1]);
@@ -833,14 +833,16 @@
 		vec = 63 - dclz(eirr);
 		ih = &rmixl_intrhand[vec];
 
-		int s = splhigh();
+		asm volatile("dmfc0 %0, $9, 7;" : "=r"(eimr));
+		asm volatile("dmtc0 $0, $9, 7;");
 		vecbit = 1ULL << vec;
+		KASSERT ((vecbit & eimr) == 0);
 		KASSERT ((vecbit & RMIXL_EIRR_PRESERVE_MASK) == 0);
 		asm volatile("dmfc0 %0, $9, 6;" : "=r"(eirr));
 		eirr &= RMIXL_EIRR_PRESERVE_MASK;
 		eirr |= vecbit;
 		asm volatile("dmtc0 %0, $9, 6;" :: "r"(eirr));
-		splx(s);
+		asm volatile("dmtc0 %0, $9, 7;" :: "r"(eimr));
 
 		if (vec < 32)
 			RMIXL_PICREG_WRITE(RMIXL_PIC_INTRACK,

Reply via email to