Module Name: src
Committed By: tsutsui
Date: Wed Mar 16 14:54:31 UTC 2011
Modified Files:
src/sys/arch/mips/mips: copy.S
Log Message:
Fix possible load delay hazard on R3000.
(probably no one has set breakpoint on R3000?)
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/mips/mips/copy.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/copy.S
diff -u src/sys/arch/mips/mips/copy.S:1.10 src/sys/arch/mips/mips/copy.S:1.11
--- src/sys/arch/mips/mips/copy.S:1.10 Wed Jul 7 01:21:47 2010
+++ src/sys/arch/mips/mips/copy.S Wed Mar 16 14:54:31 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: copy.S,v 1.10 2010/07/07 01:21:47 chs Exp $ */
+/* $NetBSD: copy.S,v 1.11 2011/03/16 14:54:31 tsutsui Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -482,8 +482,8 @@
PTR_S v0, PCB_ONFAULT(v1)
INT_S a1, 0(a0) # store word
PTR_S zero, PCB_ONFAULT(v1)
- move v0, zero
PTR_L v1, _C_LABEL(mips_cache_ops) + MIPSX_FLUSHICACHE
+ move v0, zero
j v1 # NOTE: must not clobber v0!
li a1, 4 # size of word
END(ustore_uint32_isync)
