Module Name: src
Committed By: matt
Date: Tue Sep 11 17:51:38 UTC 2012
Modified Files:
src/sys/arch/arm/arm: cpufunc.c
src/sys/arch/arm/include: cpufunc.h
Log Message:
Add secondary cache range ops
To generate a diff of this commit:
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/arm/arm/cpufunc.c
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/arm/include/cpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.115 src/sys/arch/arm/arm/cpufunc.c:1.116
--- src/sys/arch/arm/arm/cpufunc.c:1.115 Fri Sep 7 11:48:59 2012
+++ src/sys/arch/arm/arm/cpufunc.c Tue Sep 11 17:51:38 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.115 2012/09/07 11:48:59 matt Exp $ */
+/* $NetBSD: cpufunc.c,v 1.116 2012/09/11 17:51:38 matt Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.115 2012/09/07 11:48:59 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.116 2012/09/11 17:51:38 matt Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -134,6 +134,10 @@ struct cpu_functions arm2_cpufuncs = {
.cf_dcache_inv_range = (void *)cpufunc_nullop,
.cf_dcache_wb_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = cpufunc_nullop,
.cf_idcache_wbinv_range = (void *)cpufunc_nullop,
@@ -186,6 +190,10 @@ struct cpu_functions arm250_cpufuncs = {
.cf_dcache_inv_range = (void *)cpufunc_nullop,
.cf_dcache_wb_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = cpufunc_nullop,
.cf_idcache_wbinv_range = (void *)cpufunc_nullop,
@@ -238,6 +246,10 @@ struct cpu_functions arm3_cpufuncs = {
.cf_dcache_inv_range = (void *)arm3_cache_flush,
.cf_dcache_wb_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm3_cache_flush,
.cf_idcache_wbinv_range = (void *)arm3_cache_flush,
@@ -294,6 +306,10 @@ struct cpu_functions arm6_cpufuncs = {
.cf_dcache_inv_range = (void *)arm67_cache_flush,
.cf_dcache_wb_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm67_cache_flush,
.cf_idcache_wbinv_range = (void *)arm67_cache_flush,
@@ -356,6 +372,10 @@ struct cpu_functions arm7_cpufuncs = {
.cf_dcache_inv_range = (void *)arm67_cache_flush,
.cf_dcache_wb_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm67_cache_flush,
.cf_idcache_wbinv_range = (void *)arm67_cache_flush,
@@ -414,6 +434,10 @@ struct cpu_functions arm7tdmi_cpufuncs =
.cf_dcache_inv_range = (void *)arm7tdmi_cache_flushID,
.cf_dcache_wb_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm7tdmi_cache_flushID,
.cf_idcache_wbinv_range = (void *)arm7tdmi_cache_flushID,
@@ -472,6 +496,10 @@ struct cpu_functions arm8_cpufuncs = {
/*XXX*/ .cf_dcache_inv_range = (void *)arm8_cache_purgeID,
.cf_dcache_wb_range = (void *)arm8_cache_cleanID,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm8_cache_purgeID,
.cf_idcache_wbinv_range = (void *)arm8_cache_purgeID,
@@ -529,6 +557,10 @@ struct cpu_functions arm9_cpufuncs = {
/*XXX*/ .cf_dcache_inv_range = arm9_dcache_wbinv_range,
.cf_dcache_wb_range = arm9_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm9_idcache_wbinv_all,
.cf_idcache_wbinv_range = arm9_idcache_wbinv_range,
@@ -587,6 +619,10 @@ struct cpu_functions armv5_ec_cpufuncs =
/*XXX*/ .cf_dcache_inv_range = armv5_ec_dcache_wbinv_range,
.cf_dcache_wb_range = armv5_ec_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = armv5_ec_idcache_wbinv_all,
.cf_idcache_wbinv_range = armv5_ec_idcache_wbinv_range,
@@ -645,6 +681,10 @@ struct cpu_functions arm10_cpufuncs = {
/*XXX*/ .cf_dcache_inv_range = armv5_dcache_wbinv_range,
.cf_dcache_wb_range = armv5_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = armv5_idcache_wbinv_all,
.cf_idcache_wbinv_range = armv5_idcache_wbinv_range,
@@ -703,6 +743,10 @@ struct cpu_functions arm11_cpufuncs = {
.cf_dcache_inv_range = armv6_dcache_inv_range,
.cf_dcache_wb_range = armv6_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = armv6_idcache_wbinv_all,
.cf_idcache_wbinv_range = armv6_idcache_wbinv_range,
@@ -761,6 +805,10 @@ struct cpu_functions arm1136_cpufuncs =
.cf_dcache_inv_range = armv6_dcache_inv_range,
.cf_dcache_wb_range = armv6_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm11x6_idcache_wbinv_all, /* 411920 */
.cf_idcache_wbinv_range = arm11x6_idcache_wbinv_range, /* 371025 */
@@ -819,6 +867,10 @@ struct cpu_functions arm1176_cpufuncs =
.cf_dcache_inv_range = armv6_dcache_inv_range,
.cf_dcache_wb_range = armv6_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = arm11x6_idcache_wbinv_all, /* 415045 */
.cf_idcache_wbinv_range = arm11x6_idcache_wbinv_range, /* 371367 */
@@ -878,6 +930,10 @@ struct cpu_functions arm11mpcore_cpufunc
.cf_dcache_inv_range = armv5_dcache_inv_range,
.cf_dcache_wb_range = armv5_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = armv6_idcache_wbinv_all,
.cf_idcache_wbinv_range = armv5_idcache_wbinv_range,
@@ -936,6 +992,10 @@ struct cpu_functions sa110_cpufuncs = {
/*XXX*/ .cf_dcache_inv_range = sa1_cache_purgeD_rng,
.cf_dcache_wb_range = sa1_cache_cleanD_rng,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = sa1_cache_purgeID,
.cf_idcache_wbinv_range = sa1_cache_purgeID_rng,
@@ -993,6 +1053,10 @@ struct cpu_functions sa11x0_cpufuncs = {
/*XXX*/ .cf_dcache_inv_range = sa1_cache_purgeD_rng,
.cf_dcache_wb_range = sa1_cache_cleanD_rng,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = sa1_cache_purgeID,
.cf_idcache_wbinv_range = sa1_cache_purgeID_rng,
@@ -1050,6 +1114,10 @@ struct cpu_functions fa526_cpufuncs = {
.cf_dcache_inv_range = fa526_dcache_inv_range,
.cf_dcache_wb_range = fa526_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = fa526_idcache_wbinv_all,
.cf_idcache_wbinv_range = fa526_idcache_wbinv_range,
@@ -1107,6 +1175,10 @@ struct cpu_functions ixp12x0_cpufuncs =
/*XXX*/ .cf_dcache_inv_range = sa1_cache_purgeD_rng,
.cf_dcache_wb_range = sa1_cache_cleanD_rng,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = sa1_cache_purgeID,
.cf_idcache_wbinv_range = sa1_cache_purgeID_rng,
@@ -1165,6 +1237,10 @@ struct cpu_functions xscale_cpufuncs = {
.cf_dcache_inv_range = xscale_cache_flushD_rng,
.cf_dcache_wb_range = xscale_cache_cleanD_rng,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = xscale_cache_purgeID,
.cf_idcache_wbinv_range = xscale_cache_purgeID_rng,
@@ -1222,6 +1298,10 @@ struct cpu_functions cortex_cpufuncs = {
.cf_dcache_wb_range = armv7_dcache_wb_range,
.cf_dcache_wbinv_range = armv7_dcache_wbinv_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_icache_sync_range = armv7_icache_sync_range,
.cf_idcache_wbinv_range = armv7_idcache_wbinv_range,
@@ -1283,6 +1363,10 @@ struct cpu_functions sheeva_cpufuncs = {
.cf_dcache_inv_range = sheeva_dcache_inv_range,
.cf_dcache_wb_range = sheeva_dcache_wb_range,
+ .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_inv_range = (void *)cpufunc_nullop,
+ .cf_sdcache_wb_range = (void *)cpufunc_nullop,
+
.cf_idcache_wbinv_all = armv5_ec_idcache_wbinv_all,
.cf_idcache_wbinv_range = sheeva_idcache_wbinv_range,
Index: src/sys/arch/arm/include/cpufunc.h
diff -u src/sys/arch/arm/include/cpufunc.h:1.58 src/sys/arch/arm/include/cpufunc.h:1.59
--- src/sys/arch/arm/include/cpufunc.h:1.58 Fri Sep 7 11:48:59 2012
+++ src/sys/arch/arm/include/cpufunc.h Tue Sep 11 17:51:38 2012
@@ -131,6 +131,10 @@ struct cpu_functions {
void (*cf_dcache_inv_range) (vaddr_t, vsize_t);
void (*cf_dcache_wb_range) (vaddr_t, vsize_t);
+ void (*cf_sdcache_wbinv_range)(vaddr_t, paddr_t, psize_t);
+ void (*cf_sdcache_inv_range) (vaddr_t, paddr_t, psize_t);
+ void (*cf_sdcache_wb_range) (vaddr_t, paddr_t, psize_t);
+
void (*cf_idcache_wbinv_all) (void);
void (*cf_idcache_wbinv_range)(vaddr_t, vsize_t);
@@ -179,6 +183,10 @@ extern u_int cputype;
#define cpu_dcache_inv_range(a, s) cpufuncs.cf_dcache_inv_range((a), (s))
#define cpu_dcache_wb_range(a, s) cpufuncs.cf_dcache_wb_range((a), (s))
+#define cpu_sdcache_wbinv_range(a, b, s) cpufuncs.cf_sdcache_wbinv_range((a), (b), (s))
+#define cpu_sdcache_inv_range(a, b, s) cpufuncs.cf_sdcache_inv_range((a), (b), (s))
+#define cpu_sdcache_wb_range(a, b, s) cpufuncs.cf_sdcache_wb_range((a), (b), (s))
+
#define cpu_idcache_wbinv_all() cpufuncs.cf_idcache_wbinv_all()
#define cpu_idcache_wbinv_range(a, s) cpufuncs.cf_idcache_wbinv_range((a), (s))
