Module Name: src
Committed By: skrll
Date: Thu Jul 31 10:44:58 UTC 2014
Modified Files:
src/sys/arch/arm/arm: cpufunc_asm_arm11.S
Log Message:
Comments.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/arm/cpufunc_asm_arm11.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc_asm_arm11.S
diff -u src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.14 src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.15
--- src/sys/arch/arm/arm/cpufunc_asm_arm11.S:1.14 Thu Jul 31 07:14:03 2014
+++ src/sys/arch/arm/arm/cpufunc_asm_arm11.S Thu Jul 31 10:44:58 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_arm11.S,v 1.14 2014/07/31 07:14:03 skrll Exp $ */
+/* $NetBSD: cpufunc_asm_arm11.S,v 1.15 2014/07/31 10:44:58 skrll Exp $ */
/*
* Copyright (c) 2002, 2005 ARM Limited
@@ -47,9 +47,9 @@ ENTRY(arm11_setttb)
#endif
cmp r1, #0
- mcr p15, 0, r0, c2, c0, 0 /* TTBR0 set */
+ mcr p15, 0, r0, c2, c0, 0 /* set the new TTBR0 */
#ifdef ARM_MMU_EXTENDED
- mcreq p15, 0, r0, c2, c0, 1 /* TTBR1 set */
+ mcreq p15, 0, r0, c2, c0, 1 /* set the new TTBR1 */
#else
mcrne p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */
mcrne p15, 0, r0, c7, c10, 4 /* drain write buffer */
@@ -72,9 +72,9 @@ ENTRY(arm11_context_switch)
cmp r1, #0
#endif
mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- mcr p15, 0, r0, c2, c0, 0 /* TTBR0 set */
+ mcr p15, 0, r0, c2, c0, 0 /* set the new TTBR0 */
#ifdef ARM_MMU_EXTENDED
- mcreq p15, 0, r0, c2, c0, 1 /* TTBR1 set is asid 0 */
+ mcreq p15, 0, r0, c2, c0, 1 /* set the new TTBR1 */
#else
mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */
#endif
