Module Name: src
Committed By: msaitoh
Date: Wed Jan 10 07:04:54 UTC 2018
Modified Files:
src/sys/arch/x86/include: specialreg.h
Log Message:
Add Intel cpuid 7 %edx IBRS(IBPB Speculation Control) and
STIBP(STIBP Speculation Control) from OpenBSD.
To generate a diff of this commit:
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.106 src/sys/arch/x86/include/specialreg.h:1.107
--- src/sys/arch/x86/include/specialreg.h:1.106 Wed Jan 10 04:45:24 2018
+++ src/sys/arch/x86/include/specialreg.h Wed Jan 10 07:04:54 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.106 2018/01/10 04:45:24 msaitoh Exp $ */
+/* $NetBSD: specialreg.h,v 1.107 2018/01/10 07:04:54 msaitoh Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -394,9 +394,12 @@
/* %edx */
#define CPUID_SEF_AVX512_4VNNIW __BIT(2)
#define CPUID_SEF_AVX512_4FMAPS __BIT(3)
+#define CPUID_SEF_IBRS __BIT(26) /* IBRS / IBPB Speculation Control */
+#define CPUID_SEF_STIBP __BIT(27) /* STIBP Speculation Control */
#define CPUID_SEF_FLAGS2 "\20" \
- "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS"
+ "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \
+ "\33" "IBRS" "\34" "STIBP"
/*
* CPUID Processor extended state Enumeration Fn0000000d
