Dear Trent Piepho, > On Thu, Oct 17, 2013 at 11:23 PM, Marek Vasut <ma...@denx.de> wrote: > > Dear Trent Piepho, > > > >> On Thu, Oct 17, 2013 at 9:33 PM, Marek Vasut <ma...@denx.de> wrote: > >> > Dear Mark Brown, > >> > > >> >> On Tue, Oct 01, 2013 at 01:14:25PM -0700, Trent Piepho wrote: > >> >> > There are two bits which control the CS line in the CTRL0 register: > >> >> > LOCK_CS and IGNORE_CRC. The latter would be better named > >> >> > DEASSERT_CS in SPI mode. > >> >> > >> >> Applied all, thanks. > >> > > >> > Did the patches undergo any kind of testing? I was busy so I couldn't > >> > even review them yet, sorry. > >> > >> I've tested them extensively on my hardware and not found any bugs. > > > > What hardware is that? Can you please describe it? > > It's proprietary hardware and the design isn't mine to release. Does > it really matter? Is there anything about the Linux SPI driver that > you would like to know in particular?
I'd like to know if this was tested with anything but hardware we know nothing about. > >> While the driver in it's current state does have bugs that are fixed > >> by the patches. I'd be interested in a benchmark with SPI flash. In > >> my application there was a significant speed up, but it's somewhat > >> different than SPI flash. > > > > SPI flashes are the most significant users of this IP block on the > > MX23/MX28, that's why I'm unhappy patches that might break them were > > pulled in without any Tested-by/Reviewed-by/Acked-by . > > I first posted the patches in March. Plenty of time for an adequately > interested party to test them. If there is a problem that I missed > found then you know where to find me. I see them being posted at the begining of October though. Best regards, Marek Vasut ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60135031&iu=/4140/ostg.clktrk _______________________________________________ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
