From: Govindraj Raja <govindraj.r...@imgtec.com>

Patch 1/4 to 3/4 are pll calculation fixes for clock settings.

Patch 4/4: Is a reword and repost based on earlier thread:
http://patchwork.linux-mips.org/patch/10108/

Series Based on 4.2-rc7
Tested with Pistachio Bring-up-Board.

Changes from v5:
----------------
Cc: <stable@vger.kernel.org> # 4.1

This patch series is needed for 4.1-stable as well.
So adding necessary commit-id for Fixes.
Boot is broken on 4.1 stable without this patch series.

Changes from v4:
----------------
Fixes comments from Andrew and added Andrew's
reviewed by.

http://patchwork.linux-mips.org/patch/11014/
http://patchwork.linux-mips.org/patch/11016/


Changes from v3:
---------------
Fixes comments to bring back the poll rate table with
unsigned long int as discussed in below thread.

http://patchwork.linux-mips.org/patch/10900/

Changes from v2:
---------------
Fixes comments from Sergei as dicussed in below thread:
http://patchwork.linux-mips.org/patch/10903/

Changes from v1:
---------------
Fix comments from Andrew.
Topics:

* http://patchwork.linux-mips.org/patch/10888/
  (Remove long conversion for pll_rate_table variables)
        
* http://patchwork.linux-mips.org/patch/10889/
  (reword pll to PLL)

* http://patchwork.linux-mips.org/patch/10891/
  (squash 4/6 to 3/6)

* http://patchwork.linux-mips.org/patch/10892/
  (squash 5/6 to 3/6) 

* http://patchwork.linux-mips.org/patch/10893/
  (Add missing signed-off)


Damien.Horsley (1):
  clk: pistachio: correct critical clock list

Zdenko Pulitika (3):
  clk: pistachio: Fix 32bit integer overflows
  clk: pistachio: Fix override of clk-pll settings from boot loader
  clk: pistachio: Fix PLL rate calculation in integer mode

 drivers/clk/pistachio/clk-pistachio.c | 19 ++++++---
 drivers/clk/pistachio/clk-pll.c       | 77 +++++++++++++++++++++++++++--------
 drivers/clk/pistachio/clk.h           | 14 +++----
 3 files changed, 80 insertions(+), 30 deletions(-)

-- 
1.9.1

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