Hi all, some new findings on this issue:
-The OpenBSD driver for this chip is called mpi and performs better (Write speed ~35MB/s, Read speed ~70 MB/s). -Speking of write caching, the NetBSD driver does not seem to have code which could activate it. There is a bit defined in mpt_mpilib.h which could be set in some kind of settings page (_RAID_VOL0_SETTINGS): #define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001) -The OpenBSD driver has a function to (de)activate the write caching called mpi_ioctl_cache() (see: http://www.openbsd.org/cgi-bin/cvsweb/~checkout~/src/sys/dev/ic/mpi.c?rev=1.165;content-type=text%2Fplain ). How would this be implemented in NetBSD? As a hack for testing, does anybody see a chance to hard-code this bit-setting into the driver? Regards, Stephan