> > Well, no, proper domain synchronization doesn't just give you > an incremental advantage. The use of flip-flops between > clock domains is done to trade latency for guaranteed > stability. The idea is to isolate the effects of > metastability to a single clock edge that won't be used to > clock anything else. Unless a metastable event somehow lasts > more than one clock period (or half-period) it won't > constitute a failure... and that never happens in practice, > in the absence of a hard failure. Correct? Or am I missing > something? (e.g., are we talking cosmic-ray hits, which are > much more likely to affect RAM elements than clock synchronizers?) >
A flipflop used as a synchronizer *is* a RAM element subject to upset, albeit one that can be made quite robust with internal redundancy. Even without TMR or other similar schemes, the probability of upset IS pretty low. However, as Black or Scholes said(I can't remember which), "One should not confuse very low probability with impossible". If it absolutely, positively can't take any hit, then some more work is involved. James Lux, P.E. Task Manager, SOMD Software Defined Radios Flight Communications Systems Section Jet Propulsion Laboratory 4800 Oak Grove Drive, Mail Stop 161-213 Pasadena, CA, 91109 +1(818)354-2075 phone +1(818)393-6875 fax _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
