Dear Fabio,
On 12/22/2012 02:34 PM, fabi...@quipo.it wrote:
I answer here to Bob Bill and Magnus.
Hi
I think I would grab some sort of USB thermometer and start logging
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating
capacitor.
They are cheap and have very low bias currents.
Bob
The suspect is temperature, the first
thing I'm suspecting is the FE5680A temp coefficient.
When it comes to phase, your interpolator may also be sensitive.
I didnt grasp the "real numbers", so I tried estimating
the local drift, i.e. the drift value every 2k samples.
Here the results:
http://www.flickr.com/photos/14336723@N08/8296002061/
The drift stays around -3.2x10^-10 then
abruptly goes to -2.4x10^-10, so if the culprit
is the 5680, it's frequency should change about 1x10^-10,
if I didnt screw up all the calculations.
Does this make sense?
Sounds a bit on the high side.
As for the buffer opamp, I will try with MCP6001,
cheap and it's input impedance is so high I will be
limited by the pcb...
By the way, my LM358 seem to be injecting 1.5nA
into the ramp capacitor until it levels to around 1-1.5V.
Like Bob said, start logging the temperature.
Since you have about 86400 s period on this behaviour, I expect that
heating up in the morning (sun or just habits of humans roughly
aligned with sun patterns) be the reason, so this would be temperature
dependent. Plotting supply voltage may be another reason.
Magnus, I will log some temperatures and voltages.
Goodie.
scope probe set to 10x, DC coupled.
Do you really get 1-2 cycle long difference measures that way?
You risk a high non-linearity at the small difference side otherwise,
as it takes time to wake the transistors.
...
As I commented, you might want 1-2 cycles to pass, so adding a second
DFF might be needed for that task.
So if I'm understanding you are suggesting to measure on the
second 10MHz edge, instead of the first, I would have 100 to 200nS
instead of 0 to 100nS. I didnt think about this, I like the idea!
Indeed. Some even let one more edge go and measure between 200 and 300
ns.
Like that you try your interpolator wings!
Sorry, I didnt undestand this part.
Trivial, I like that you experiment and build your own interpolator
design, build experience.
I do recommend you to check out the Wenzel clock input stage, which
is being deployed in the TADD-2 divider. Squares up sine clocks
nicely.
Cheers,
Magnus
Hi Fabio,
I am not crazy about your 10 MHz input circuit. You might want to
consider
investigating John Miles input arrangement at the following web site:
http://www.ke5fx.com/ac.htm
I used it to drive an input to a divider chip without the output
resistor or
capacitor.
Bill....WB6BNQ
Magnus and Bill, the input stage I'm using was inspired by
the wenzel second schematic on this page:
http://www.wenzel.com/documents/waveform.html
But you both are right, I'm starting to see that it's
not that stable.
I will try the discrete solution on the wenzel page.
Good. It amplifies up the clock so that you will have low jitter.
Is the transformer mandatory or I can avoid it?
You can avoid it, just make sure that you get the transistors properly
biased, so DC blocking cap and some resistors.
In case I have some IF-cans but I've never used and
dont know much about them.
It's relative benign transistors being used.
Good luck and look forward to your progress reports.
You got me inspired to try something myself. :)
Cheers,
Magnus
