Hi There may be “tweaks” to get the noise shaping working better on the 10 MHz input. Some PLL chips have pre-multipliers for the reference to improve things…. the magic apparently works better with a fast input …(and yes, there are good reasons why)
Bob > On Jan 29, 2018, at 3:38 PM, John Ackermann N8UR <j...@febo.com> wrote: > > I'm slowly learning how these ultra-low-jitter clock generators work. > Yesterday I posted some phase noise results in "free run" mode where the 48 > MHz crystal on the evaluation board was the only reference. > > Today I tried replacing the crystal with a 10 MHz input, and found that the > evaluation board requires surgery to support that. What I was able to do, > though, was feed 10 MHz into the "Input 0" port which apparently disciplines > the free-running crystal. I used a 10811A fed into a T2-Mini with divider > removed, so all it does is provide the Wenzel squaring circuit. Results > attached, added to the plots from yesterday. Also attached is an ADEV plot > proving that the 10 MHz is in control. > > The close-in phase noise is quite amazing, but the floor is much worse than > in free-run mode. This was a very hay-wire experiment, so there are lots of > things that could be suboptimal. It sure would be nice to get the best of > both those plots! > > John > <siLabs5340-test-2-adev.png><siLabs5340-test-2.png>_______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
