Hi

The closer the beat note / spur / crud is to carrier, the bigger its effect on 
things
like ADEV and other timing issues. Indeed 97 KHz is pretty far out compared to 
most of what people worry about. It is also quite far compared to the PLL 
bandwidth
of just about anything you normally would attach to a standard. 

One would *guess* that the level of the spur would be same / same at lower IF 
frequencies. If for some obscure reason the level changes, that could be an 
issue. 
Maybe it gets lower :)

The rest of tthe argument gets into “nice numbers”. Cutting the IF in half 
would get you
into parts in 10^-18. From a round numbers standpoint, that has a *lot* of 
appeal. 
Does it actually help in what you will be using the device for? The answer will
always be “that depends on what I’m doing ….”. 

Bob

> On Jan 14, 2020, at 1:58 AM, Anders Wallin <anders.e.e.wal...@gmail.com> 
> wrote:
> 
> prototype block-diagram, short list of chips in the implementation, and a
> discussion on resolution now on ohwr.org:
> https://ohwr.org/project/microstepper/wikis/Block-diagram
> 
> The obvious way to increase resolution (make the smallest frequency step
> smaller) is to lower the IF.
> I guess the limit is that we don't want the IF to feed-thru the
> phase-detector and PLL all the way to a PN-spur in the output-OCXO.
> My first prototype used 97 kHz IF and that gives a resolution of 1.7e-17.
> Lowering that by /2 or /4 might be a good idea?
> Other comments and ideas welcome!
> 
> Anders
> 
> 
>> my plan is to present our DIY version of this, an open hardware design, at
>> EFTF2020.
>> we have two AD9912:s clocked at 1GHz (derived from the maser) producing
>> two LO's that drive a mixer-board that locks an OCXO that feeds a PICDIV.
>> 
>>> 
>>> 
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