Hi Fabio,

On 03/26/2013 05:54 AM, Fabio Estevam wrote:
Currently when booting a mx6 solo processor get_cpu_rev() returns 0x62xxx, which
is an invalid mx6 CPU revision. This causes run-time problems when trying to use
VPU library in the kernel, as this library loads the VPU firmware according
to the CPU type.

Fix get_cpu_rev() so that it correctly returns 0x61xxx for a mx6 solo.

While at it, also remove the duplicate definitions for MXC_CPU_ types.

Tested on a Wandboard solo and on a mx6qsabresd.

Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
  arch/arm/cpu/armv7/mx6/soc.c              |   28 ++++++++++++----------------
  arch/arm/imx-common/cpu.c                 |   16 ++++++++++------
  arch/arm/include/asm/arch-mx5/sys_proto.h |    7 -------
  arch/arm/include/asm/arch-mx6/sys_proto.h |    7 -------
  4 files changed, 22 insertions(+), 36 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 193ba12..87725eb 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -43,22 +43,18 @@ struct scu_regs {
  u32 get_cpu_rev(void)
  {
        struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
-       u32 reg = readl(&anatop->digprog_sololite);
-       u32 type = ((reg >> 16) & 0xff);
-
-       if (type != MXC_CPU_MX6SL) {
-               reg = readl(&anatop->digprog);
-               type = ((reg >> 16) & 0xff);
-               if (type == MXC_CPU_MX6DL) {
-                       struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
-                       u32 cfg = readl(&scu->config) & 3;
-
-                       if (!cfg)
-                               type = MXC_CPU_MX6SOLO;
-               }
-       }
-       reg &= 0xff;                /* mx6 silicon revision */
-       return (type << 12) | (reg + 0x10);
+       u32 fsl_system_rev;
+       u32 cpu_rev = readl(&anatop->digprog);
+
+       /* Chip Silicon ID */
+       fsl_system_rev = ((cpu_rev >> 16) & 0xFF) << 12;
+       /* Chip silicon major revision */
+       fsl_system_rev |= ((cpu_rev >> 8) & 0xFF) << 4;
+       fsl_system_rev += 0x10;
+       /* Chip silicon minor revision */
+       fsl_system_rev |= cpu_rev & 0xFF;

Nitpick: 0x0F to avoid trashing major revision?

Tested on Quad (TO 1.0) and Solo (TO 1.1)

Tested-By: Eric Nelson <eric.nel...@boundarydevices.com>

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