Hi Eric, Thanks for your comments and sorry for my delayed response. Busy with some other projects last week...
I noticed these pins on the board. They have optional pull-down resistors, which are not placed by default. This would result in mode[2:0] being 111: "All capable. Auto-negotiation enabled". And as I look at the code, the cofiguration bits are set quite identical to this mode (10 + 100, Both FULL + HALF, aneg enabled). And on the other hand: after this sw-config + reset, the autonegotiation itself succeeds, indicated by the status bits and LED's. But for some reason it is not ready to transmit yet... Regards, Ruud > -----Oorspronkelijk bericht----- > Van: Eric Bénard [mailto:e...@eukrea.com] > Verzonden: vrijdag 7 juni 2013 11:40 > Aan: Ruud Commandeur > CC: Fabio Estevam; Marek Vašut; U-Boot list > Onderwerp: Re: [U-Boot] TFTP timeouts, i.mx fec problem? > > Hi Ruud, > > Le Fri, 7 Jun 2013 11:28:54 +0200, > Ruud Commandeur <rcommand...@clb.nl> a écrit : > > I have not come any further yet in finding the real cause. > For now, I just tested with workarounds like lowering the ARP > timeout and skipping the phy reset (or only reset for the 1st > transfer). Note that also the phy reset and waiting for > "link-up" takes about 2 seconds every time. I did not realise > earlier that it would take this long, but this is the part > before the "TFTP from server..." line is displayed and he > transfer even starts. > > > isn't your problem related to the fact that when you reset the PHY it > samples some pins to get some settings and that after the > first reset it > could gets wrong settings because the i.MX pins are in a wrong state > (because handled by the FEC) leading to the errors you meet ? > > Eric > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
