We have changed to use dwc3 generic driver for Rockchip SoCs
so let amend dts to fix it and keep in line with Linux Kernel.
Signed-off-by: Frank Wang <frank.w...@rock-chips.com>
---
arch/arm/dts/rk3399-evb.dts | 28 ++++++++++++---
arch/arm/dts/rk3399-puma.dtsi | 35 +++++++++++++++---
arch/arm/dts/rk3399-u-boot.dtsi | 11 ++++++
arch/arm/dts/rk3399.dtsi | 64 +++++++++++++++++++++------------
4 files changed, 105 insertions(+), 33 deletions(-)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 4129e902a8..eccf3d40c8 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -56,6 +56,10 @@
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
};
vcc5v0_typec0: vcc5v0-typec0-en {
@@ -164,6 +168,14 @@
status = "okay";
};
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
&uart2 {
status = "okay";
};
@@ -177,20 +189,26 @@
};
&usbdrd3_0 {
- vbus-supply = <&vcc5v0_typec0>;
status = "okay";
};
-&usb_host1_ehci {
+&usbdrd3_1 {
status = "okay";
};
-&usb_host1_ohci {
+&usbdrd_dwc3_0 {
status = "okay";
};
-&usbdrd3_1 {
- vbus-supply = <&vcc5v0_typec1>;
+&usbdrd_dwc3_1 {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
status = "okay";
};
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 558b6337df..ff5e6477ed 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -129,6 +129,16 @@
regulator-always-on;
};
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-low;
+ gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ };
+
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -487,6 +497,14 @@
status = "okay";
};
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
&uart2 {
status = "okay";
};
@@ -503,6 +521,18 @@
status = "okay";
};
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "disabled";
};
@@ -511,11 +541,6 @@
status = "disabled";
};
-&usbdrd3_1 {
- status = "okay";
- tsd,usb-port-power = "usbhub_enable";
-};
-
&vopb {
status = "okay";
};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 8b857ccfc7..e65b266604 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -98,6 +98,17 @@
u-boot,dm-pre-reloc;
};
+
+&u2phy0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&u2phy0_otg {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
&vopb {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 6b7c136ab8..4d77d88ca1 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -345,22 +345,21 @@
status = "disabled";
};
- usbdrd3_0: dwc3_typec0: usb@fe800000 {
+ usbdrd3_0: usb0 {
compatible = "rockchip,rk3399-dwc3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
- <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
- <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+ <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "aclk_usb3_rksoc_axi_perf",
- "aclk_usb3", "grf_clk";
+ "bus_clk", "grf_clk";
+ power-domains = <&power RK3399_PD_USB3>;
resets = <&cru SRST_A_USB3_OTG0>;
reset-names = "usb3-otg";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
status = "disabled";
- usbdrd_dwc3_0: dwc3 {
+ usbdrd_dwc3_0: dwc3@fe800000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -372,32 +371,33 @@
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- power-domains = <&power RK3399_PD_USB3>;
+ snps,tx-ipgap-linecheck-dis-quirk;
+ snps,xhci-slow-suspend-quirk;
+ snps,xhci-trb-ent-quirk;
+ snps,usb3-warm-reset-on-resume-quirk;
status = "disabled";
};
};
- dwc3_typec1: usbdrd3_1: usb@fe900000 {
+ usbdrd3_1: usb1 {
compatible = "rockchip,rk3399-dwc3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
- <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
- <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
+ <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "aclk_usb3_rksoc_axi_perf",
- "aclk_usb3", "grf_clk";
+ "bus_clk", "grf_clk";
+ power-domains = <&power RK3399_PD_USB3>;
resets = <&cru SRST_A_USB3_OTG1>;
reset-names = "usb3-otg";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
status = "disabled";
- usbdrd_dwc3_1: dwc3 {
+ usbdrd_dwc3_1: dwc3@fe900000 {
compatible = "snps,dwc3";
reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
- dr_mode = "otg";
+ dr_mode = "host";
phys = <&u2phy1_otg>, <&tcphy1_usb3>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
@@ -405,8 +405,10 @@
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- power-domains = <&power RK3399_PD_USB3>;
+ snps,tx-ipgap-linecheck-dis-quirk;
+ snps,xhci-slow-suspend-quirk;
+ snps,xhci-trb-ent-quirk;
+ snps,usb3-warm-reset-on-resume-quirk;
status = "disabled";
};
};
@@ -1352,6 +1354,7 @@
tcphy0: phy@ff7c0000 {
compatible = "rockchip,rk3399-typec-phy";
reg = <0x0 0xff7c0000 0x0 0x40000>;
+ #phy-cells = <1>;
clocks = <&cru SCLK_UPHY0_TCPDCORE>,
<&cru SCLK_UPHY0_TCPDPHY_REF>;
clock-names = "tcpdcore", "tcpdphy-ref";
@@ -1363,6 +1366,13 @@
<&cru SRST_P_UPHY0_TCPHY>;
reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
rockchip,grf = <&grf>;
+ rockchip,typec-conn-dir = <0xe580 0 16>;
+ rockchip,usb3tousb2-en = <0xe580 3 19>;
+ rockchip,usb3-host-disable = <0x2434 0 16>;
+ rockchip,usb3-host-port = <0x2434 12 28>;
+ rockchip,external-psm = <0xe588 14 30>;
+ rockchip,pipe-status = <0xe5c0 0 0>;
+ rockchip,uphy-dp-sel = <0x6268 19 19>;
status = "disabled";
tcphy0_dp: dp-port {
@@ -1377,6 +1387,7 @@
tcphy1: phy@ff800000 {
compatible = "rockchip,rk3399-typec-phy";
reg = <0x0 0xff800000 0x0 0x40000>;
+ #phy-cells = <1>;
clocks = <&cru SCLK_UPHY1_TCPDCORE>,
<&cru SCLK_UPHY1_TCPDPHY_REF>;
clock-names = "tcpdcore", "tcpdphy-ref";
@@ -1388,6 +1399,13 @@
<&cru SRST_P_UPHY1_TCPHY>;
reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
rockchip,grf = <&grf>;
+ rockchip,typec-conn-dir = <0xe58c 0 16>;
+ rockchip,usb3tousb2-en = <0xe58c 3 19>;
+ rockchip,usb3-host-disable = <0x2444 0 16>;
+ rockchip,usb3-host-port = <0x2444 12 28>;
+ rockchip,external-psm = <0xe594 14 30>;
+ rockchip,pipe-status = <0xe5c0 16 16>;
+ rockchip,uphy-dp-sel = <0x6268 3 19>;
status = "disabled";
tcphy1_dp: dp-port {
--
2.17.1
