Hi Jagan,

All ack related will be fixed in the next patches.

BR,
Frank

On 2020/4/28 17:27, Jagan Teki wrote:
On Tue, Apr 28, 2020 at 12:01 PM Frank Wang <frank.w...@rock-chips.com> wrote:
This implements the Type-C PHY driver for Rockchip platform
with Cadence IP block.

Signed-off-by: Frank Wang <frank.w...@rock-chips.com>
Signed-off-by: William Wu <william...@rock-chips.com>
---
  drivers/phy/Kconfig                    |   6 +
  drivers/phy/Makefile                   |   1 +
  drivers/phy/phy-rockchip-typec.c       | 534 +++++++++++++++++++++++++
  include/linux/usb/rockchip_phy_typec.h |  52 +++
  4 files changed, 593 insertions(+)
  create mode 100644 drivers/phy/phy-rockchip-typec.c
  create mode 100644 include/linux/usb/rockchip_phy_typec.h

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index a72f34f0d4..c8472ef245 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -90,6 +90,12 @@ config PHY_DA8XX_USB
         help
           Enable this to support the USB PHY on DA8xx SoCs.

+config PHY_ROCKCHIP_TYPEC
+       bool "Support Rockchip TYPEC PHY Driver"
+       depends on PHY && ARCH_ROCKCHIP
This has to select PHY otherwise enabling PHY_ROCKCHIP_TYPEC won't
enable the driver itself it require explicit PHY enablement.

ACK

[...]

diff --git a/drivers/phy/phy-rockchip-typec.c b/drivers/phy/phy-rockchip-typec.c
new file mode 100644
index 0000000000..cd0f055bd4
--- /dev/null
+++ b/drivers/phy/phy-rockchip-typec.c
@@ -0,0 +1,534 @@
+// SPDX-License-Identifier:     GPL-2.0
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Based on drivers/phy/rockchip/phy-rockchip-typec.c in Linux Kernel.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <dm/of_access.h>
+#include <generic-phy.h>
+#include <power/regulator.h>
+#include <regmap.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm-generic/io.h>
+#include <asm/arch/clock.h>
This has to be
#include <asm/arch-rockchip/clock.h>
This driver refer some macros that defined in <asm/arch/clock.h>, not in <asm/arch-rockchip/clock.h>.

[...]

+static int _rockchip_usb3_phy_power_on(struct rockchip_typec_phy *tcphy)
+{
+       struct rockchip_usb3phy_port_cfg *cfg = &tcphy->port_cfgs;
+       const struct usb3phy_reg *reg = &cfg->pipe_status;
+       int timeout, new_mode, ret = 0;
+       u32 val;
+
+       mutex_lock(&tcphy->lock);
No mutex in u-boot, please drop.

ACK for all mutex related.

[...]

+       if (tries && !ret)
+               dev_err(tcphy->dev, "Needed %d loops to turn on\n", tries);
Please include #include <dm/device_compat.h>

ACK

[...]

+       printf("Rockchip Type-C PHY is initialized\n");
Mark it dev_dbg or debug,print won't be required.

ACK

Jagan.



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