Hi Tom,
On Tue, Jun 16, 2020 at 7:30 PM Tom Rini <tr...@konsulko.com> wrote:
> Yeah, OK, I got far enough on trying to convert this that I see I don't
> quite have time to pick it up and run with it. It looks like there's
> going to be some extra fun around resetting the PHY perhaps? My quick
> pass got things seeing a generic PHY and not the atheros one. If you
> have time to make something you'd like me to test for conversion let me
> know. But I'm going to pick up debugging the problem I see on the
> platform right now in case there's a wider problem it's showing.
Here are two untested patches you could try.
From 6b6500681ea6ff9fdaf387f7f37865b4185bd776 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <feste...@gmail.com>
Date: Wed, 17 Jun 2020 08:52:03 -0300
Subject: [PATCH 1/2] ARM: dts: imx6qdl-sr-som: Sync with kernel 5.8-rc1
Sync the device tree with 5.8-rc1.
It basically contains the following kernel commit:
commit 86b08bd5b99480b79a25343f24c1b8c4ddcb5c09
Author: Russell King <rmk+ker...@armlinux.org.uk>
Date: Wed Apr 15 16:44:17 2020 +0100
ARM: dts: imx6-sr-som: add ethernet PHY configuration
Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY. The RGMII delay is
already set correctly.
Signed-off-by: Russell King <rmk+ker...@armlinux.org.uk>
Reviewed-by: Fabio Estevam <feste...@gmail.com>
Signed-off-by: Shawn Guo <shawn...@kernel.org>
, which passes the 'qca,clk-out-frequency' property.
Signed-off-by: Fabio Estevam <feste...@gmail.com>
---
arch/arm/dts/imx6qdl-sr-som.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi b/arch/arm/dts/imx6qdl-sr-som.dtsi
index 6d7f6b9035..b06577808f 100644
--- a/arch/arm/dts/imx6qdl-sr-som.dtsi
+++ b/arch/arm/dts/imx6qdl-sr-som.dtsi
@@ -53,10 +53,21 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
+ phy-handle = <&phy>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@0 {
+ reg = <0>;
+ qca,clk-out-frequency = <125000000>;
+ };
+ };
};
&iomuxc {
--
2.17.1
From 5125a9948a20f0e404c879bd4e477304909d9f02 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <feste...@gmail.com>
Date: Wed, 17 Jun 2020 08:55:27 -0300
Subject: [PATCH 2/2] mx6cuboxi: Convert to DM_ETH
Convert to Ethernet Driver Model.
Signed-off-by: Fabio Estevam <feste...@gmail.com>
---
board/solidrun/mx6cuboxi/mx6cuboxi.c | 106 ---------------------------
configs/mx6cuboxi_defconfig | 4 +
include/configs/mx6cuboxi.h | 6 --
3 files changed, 4 insertions(+), 112 deletions(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 94707bccb2..a2c2bb9e35 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -17,7 +17,6 @@
#include <image.h>
#include <init.h>
#include <log.h>
-#include <net.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
@@ -34,7 +33,6 @@
#include <fsl_esdhc_imx.h>
#include <malloc.h>
#include <miiphy.h>
-#include <netdev.h>
#include <asm/arch/crm_regs.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
@@ -237,110 +235,6 @@ int board_mmc_init(bd_t *bis)
return 0;
}
-static iomux_v3_cfg_t const enet_pads[] = {
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- /* AR8035 reset */
- IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
- /* AR8035 interrupt */
- IOMUX_PADS(PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- /* GPIO16 -> AR8035 25MHz */
- IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
- IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK)),
- IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
- IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
- IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
- IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
- IOMUX_PADS(PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
-};
-
-static void setup_iomux_enet(void)
-{
- struct gpio_desc desc;
- int ret;
-
- SETUP_IOMUX_PADS(enet_pads);
-
- ret = dm_gpio_lookup_name("GPIO4_15", &desc);
- if (ret) {
- printf("%s: phy reset lookup failed\n", __func__);
- return;
- }
-
- ret = dm_gpio_request(&desc, "phy-reset");
- if (ret) {
- printf("%s: phy reset request failed\n", __func__);
- return;
- }
-
- gpio_direction_output(ETH_PHY_RESET, 0);
- mdelay(10);
- gpio_set_value(ETH_PHY_RESET, 1);
- udelay(100);
-
- gpio_free_list_nodev(&desc, 1);
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
-
-/* On Cuboxi Ethernet PHY can be located at addresses 0x0 or 0x4 */
-#define ETH_PHY_MASK ((1 << 0x0) | (1 << 0x4))
-
-int board_eth_init(bd_t *bis)
-{
- struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
- struct mii_dev *bus;
- struct phy_device *phydev;
-
- int ret = enable_fec_anatop_clock(0, ENET_25MHZ);
- if (ret)
- return ret;
-
- /* set gpr1[ENET_CLK_SEL] */
- setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
-
- setup_iomux_enet();
-
- bus = fec_get_miibus(IMX_FEC_BASE, -1);
- if (!bus)
- return -EINVAL;
-
- phydev = phy_find_by_mask(bus, ETH_PHY_MASK, PHY_INTERFACE_MODE_RGMII);
- if (!phydev) {
- ret = -EINVAL;
- goto free_bus;
- }
-
- debug("using phy at address %d\n", phydev->addr);
- ret = fec_probe(bis, -1, IMX_FEC_BASE, bus, phydev);
- if (ret)
- goto free_phydev;
-
- return 0;
-
-free_phydev:
- free(phydev);
-free_bus:
- free(bus);
- return ret;
-}
-
#ifdef CONFIG_VIDEO_IPUV3
static void do_enable_hdmi(struct display_info_t const *dev)
{
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index df7e4611a0..3f43fb7ad0 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -50,6 +50,10 @@ CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_FEC_MXC=y
+CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 2ccf44e573..96f79e6b58 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -29,12 +29,6 @@
#define CONFIG_LBA48
#endif
-/* Ethernet Configuration */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_FEC_MXC_PHYADDR 0
-
/* Framebuffer */
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
--
2.17.1
