On Mon, 26 Jan 2026 at 14:45, Fabio Estevam <[email protected]> wrote:
>
> Hi Ilias,
>
> On Mon, Jan 26, 2026 at 3:29 AM Ilias Apalodimas
> <[email protected]> wrote:
>
> > Fabio can you please try this
> > diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
> > index d780a5060774..af9f3a3c39c0 100644
> > --- a/arch/arm/cpu/u-boot-spl.lds
> > +++ b/arch/arm/cpu/u-boot-spl.lds
> > @@ -51,8 +51,8 @@ SECTIONS
> > __rel_dyn_start = .;
> > *(.rel*)
> > __rel_dyn_end = .;
> > - . = ALIGN(8);
> > }
> > + . = ALIGN(8);
> >
> > _image_binary_end = .;
> > _end = .;
>
> Yes, this works. This is a partial revert of 8b0ebe054bb3.
Yea, i don't want to apply this, just verify what I am seeing.
So, Tom the bss size doesn't have to be 8b aligned (look below). It's
worth noting that we do have some implicit assumptions in our asm
that rel{a}.dyn must be 4b/8b aligned in armv7/v8 respectively, but
that's not what's happening here.
We want _image_binary_end to still be 8b aligned etc. Since ALIGN()
has been moved into the dyn section, we now create a section for .dyn
in SPL that was previously empty. This new section also gets copied by
objcopy. That section will be 0 or 4 bytes depending on the alignment
of the preceding code. That's what blows up on Fabios set up.
We can probably apply the patch you suggested, but we need comments in
the linker script + an update to the commit message
Cheers
/Ilias
>
> Thanks
