Convert all parent clock arrays to use struct mtk_parent. This will allow us to simplify core code later by having only one possible data type for mux parent arrays.
Signed-off-by: David Lechner <[email protected]> --- drivers/clk/mediatek/clk-mt7622.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c index 88ccb4cb8ea..bc1baf8c4e5 100644 --- a/drivers/clk/mediatek/clk-mt7622.c +++ b/drivers/clk/mediatek/clk-mt7622.c @@ -421,16 +421,13 @@ static const struct mtk_gate infra_cgs[] = { }; /* pericfg */ -static const int peribus_ck_parents[] = { - CLK_TOP_SYSPLL1_D8, - CLK_TOP_SYSPLL1_D4, +static const struct mtk_parent peribus_ck_parents[] = { + TOP_PARENT(CLK_TOP_SYSPLL1_D8), + TOP_PARENT(CLK_TOP_SYSPLL1_D4), }; -#define PERI_MUX(_id, _parents, _reg, _shift, _width) \ - MUX_FLAGS(_id, _parents, _reg, _shift, _width, CLK_PARENT_TOPCKGEN) - static const struct mtk_composite peri_muxes[] = { - PERI_MUX(CLK_PERIBUS_SEL, peribus_ck_parents, 0x05c, 0, 1), + MUX_MIXED(CLK_PERIBUS_SEL, peribus_ck_parents, 0x05c, 0, 1), }; static const struct mtk_gate_regs peri0_cg_regs = { -- 2.43.0
