On Fri, 21 Aug 2026 11:54:58 +0000, Cole Munz wrote:
> The Flipper One display bus has no MISO wire; the pin is the
> end-of-frame GPIO. Patch 1 maps spi-{tx,rx}-bus-width = <0> to
> SPI_NO_TX/SPI_NO_RX and validates transfers against the bits in
> dm_spi_xfer(). Patch 2 has the Rockchip driver pick its transfer mode
> from them so the unused FIFO stays out of the transfer. Background is
> in the v2 cover letter:
>
> [...]
Applied to https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip
(u-boot-rockchip-2027.01), thanks!
[1/2] spi: Handle spi-{tx, rx}-bus-width 0 as SPI_NO_TX/SPI_NO_RX
https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip/-/commit/300cdfa08c53e89ff277b16a719e2796e9ffa4ad
[2/2] spi: rockchip: skip the unused FIFO direction on a one-wire device
https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip/-/commit/ed58bafd0b24e15b734c624bdaf00b876e5d32e6
Best regards,
--
Quentin Schulz <[email protected]>
