On Fri, Aug 14, 2026 at 14:30:15 +0100, David Lechner wrote: > Add a new driver for MediaTek display PWM controller. This is generally > used for backlight control on MediaTek SoCs.
[...]
> +static void mtk_disp_pwm_update_bits(void __iomem *base, u32 offset, u32
> mask, u32 data)
> +{
> + u32 value = readl(base + offset);
> +
> + value &= ~mask;
> + value |= data;
> +
> + writel(value, base + offset);
> +}
Can we use clrsetbits_le32() & co. here?
