I’d like to add a configurable decimator and some averaging logic to the output 
of the FFT.  So I’ll be adding some new registers to the control bloc and 
verilog, but the overall core will still be very similar.  

I’ll take a look at the examples you reference below to see if that gets me 
going in the right direction.  Thanks.
Rich

> On Sep 3, 2018, at 8:43 PM, Jon Pendlum <jon.pend...@gmail.com> wrote:
> 
> Hey Rich,
> 
> Do you want to customize the FFT IP or use it as is? If you are using it as 
> is, there is no need to do anything. All in-tree code and IP is automatically 
> included as part of the FPGA build. If you want to customize it, I suggest 
> copying the FFT IP into your OOT and using 
> https://github.com/ejk43/rfnoc-ootexample 
> <https://github.com/ejk43/rfnoc-ootexample> as an example on how to add it 
> (see the rfnoc/ip directory). Use viv_modify_ip (available after you source 
> setupenv.sh) to customize the FFT IP. You'll want to rename it as well so it 
> does not conflict with the in-tree FFT IP.
> 
> Jonathon
> 
> On Tue, Sep 4, 2018 at 9:58 AM Rich Maes via USRP-users 
> <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
> Is there an example of modifying a out of tree (OOT) module and block to pull 
> in a rfnoc library.  Specifically I would like to pull in the AXI_FFT 
> generated code and make my own custom FFT block.  I can’t quite figure out 
> how to modify the CMAKE files, (I assume that is the proper method) to 
> reference that RFNOC library/source.  
> 
> Thanks in advance.
> Rich
> 
> 
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