Hey Andrew,

If the OOT repo is set up correctly, you will not need to add the OOT
Xilinx IPs manually -- I regularly (daily, in fact) build FPGA images in
uhd-fpga that use OOT Xilinx IP and OOT HLS, and this can be a fully
automated command-line process using the Makefile includes.

Let me know if you run into specific issues and I can try to help point out
ways to including various files from OOTs folders.

EJ

On Tue, Sep 4, 2018 at 1:06 PM Andrew Danowitz via USRP-users <
usrp-users@lists.ettus.com> wrote:

> It's true that uhd_image_builder.py will pull in all RFNOC IPs
> automatically, but if you go to simulate an OOT rfnoc block that relies on
> an IP, in my experience, you have to launch Vivado and add the UHD IP
> directory to your project.
>
> On Mon, Sep 3, 2018 at 8:43 PM, Jon Pendlum via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
>> Hey Rich,
>>
>> Do you want to customize the FFT IP or use it as is? If you are using it
>> as is, there is no need to do anything. All in-tree code and IP is
>> automatically included as part of the FPGA build. If you want to customize
>> it, I suggest copying the FFT IP into your OOT and using
>> https://github.com/ejk43/rfnoc-ootexample as an example on how to add it
>> (see the rfnoc/ip directory). Use viv_modify_ip (available after you source
>> setupenv.sh) to customize the FFT IP. You'll want to rename it as well so
>> it does not conflict with the in-tree FFT IP.
>>
>> Jonathon
>>
>> On Tue, Sep 4, 2018 at 9:58 AM Rich Maes via USRP-users <
>> usrp-users@lists.ettus.com> wrote:
>>
>>> Is there an example of modifying a out of tree (OOT) module and block to
>>> pull in a rfnoc library.  Specifically I would like to pull in the AXI_FFT
>>> generated code and make my own custom FFT block.  I can’t quite figure out
>>> how to modify the CMAKE files, (I assume that is the proper method) to
>>> reference that RFNOC library/source.
>>>
>>> Thanks in advance.
>>> Rich
>>>
>>>
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>>
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>>
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