Success. So there were a couple issues I’ll document here for completeness. There was a comment about having local IP mentioned, so I went down that route.
I made a copy of the axi_fft and Makefile in a rfnoc_myblock/lib/ip directory. From there I created a new Vivado project and loaded the XCI file and updated the IP to match the E310 part number. So now that IP is configured for the xc7z020clg484-1. I then went into the ~/rfnoc/src/uhd-fpga/usrp3/tools/make/viv_sim_preamble.mak and change the PART_ID to be xc7z020/clg484/-1 And now the axi_fft IP is located and simulation completes perfectly. Thanks for your help guys. Rich > On Sep 18, 2018, at 7:39 AM, Rich Maes via USRP-users > <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote: > > Hello Jon, > Thanks for your help. Certainly seeing a change in behavior now. The > axi_fft.xci is being referenced in the Adding IP phase, but ultimately the > same error occurs. I think, if I understand what the log says, that the IP > is locked and cannot be rebuilt for my device which is different. I am > simulating for the E310 and so the device is configured for xc7z020clg484-1. > That may be the root of the issue, but it begs how I am able to synthesize > for the E310 apparently using the same IP. Do I need to regenerate IP > manually? I have verified that the IP isn’t “read-only” in the build-ip > directory or in the original usrp3/lib/ip directory. > > BUILDER: Adding Verilog : > /home/parallels/rfnoc/src/uhd-fpga/usrp3/lib/rfnoc/dds_freq_tune.v > BUILDER: Adding Verilog : > /home/parallels/rfnoc/src/uhd-fpga/usrp3/lib/rfnoc/dds_timed.v > BUILDER: Adding IP : > /home/parallels/rfnoc/src/rfnoc-nd_fft/rfnoc/testbenches/noc_block_fftddc_tb/build-ip/xc7k410tffg900-2/axi_fft/axi_fft.xci > INFO: [IP_Flow 19-234] Refreshing IP repositories > INFO: [IP_Flow 19-1704] No user IP repositories specified > INFO: [IP_Flow 19-2313] Loaded Vivado IP repository > '/opt/Xilinx/Vivado/2017.4/data/ip'. > > > Later on however, this appears in the log. The device directory is NOT the > same directory as what I am currently building for. > > INFO: [Vivado 12-5698] Checking validity of IPs in the design for the 'XSim' > simulator... > WARNING: [Runs 36-337] The following IPs are either missing output products > or output products are not up-to-date for Simulation target. Since these IPs > are locked, no update to the output products can be done. > Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl > command 'report_ip_status' for more information. > /home/parallels/rfnoc/src/rfnoc-nd_fft/rfnoc/testbenches/noc_block_fftddc_tb/build-ip/xc7k410tffg900-2/axi_fft/axi_fft.xci > and later still > > WARNING: [SIM-utils-52] IP component XML file does not exist: > '/home/parallels/rfnoc/src/rfnoc-nd_fft/rfnoc/testbenches/noc_block_fftddc_tb/build-ip/xc7k410tffg900-2/axi_fft/axi_fft.xml' > > ERROR: [VRFC 10-2063] Module <axi_fft> not found while processing module > instance <inst_axi_fft> > [/home/parallels/rfnoc/src/rfnoc-nd_fft/rfnoc/fpga-src/noc_block_fftddc.v:262] > ERROR: [XSIM 43-3322] Static elaboration of top level Verilog design unit(s) > in library work failed. > > >> On Sep 14, 2018, at 11:53 AM, Jon Pendlum <jon.pend...@gmail.com >> <mailto:jon.pend...@gmail.com>> wrote: >> >> I see now. Simulation is a bit different than building images. To prevent >> building every IP for every simulation, the exact IP you want to use needs >> to be added to the test bench Makefile. It is pretty easy. Add the following >> to the test bench Makefile in rfnoc/testbenches/<your block>/Makefile: >> >> LIB_IP_DIR = $(BASE_DIR)/../lib/ip >> include $(LIB_IP_DIR)/axi_fft/Makefile.inc >> DESIGN_SRCS += $(abspath \ >> $(LIB_IP_AXI_FFT_SRCS) \ >> ) >> >> If you are curious where this comes from, take a look at >> usrp3/lib/rfnoc/noc_block_fft_tb/Makefile in the FPGA repo. I can see how it >> is confusing and it needs to be documented somewhere. >> >> As for using your own version of the axi_fft IP, you will need to copy it >> locally to the IP directory. It is usually easiest to import or create the >> IP in Vivado, configure as needed, generate the IP output products, and copy >> over the .xci file. >> >> Jonathon >> >> On Sat, Sep 15, 2018 at 3:32 AM Rich Maes <r...@idearockets.com >> <mailto:r...@idearockets.com>> wrote: >> I did follow that Getting Started guide and produce the text book >> rfnoc_tutorial OOT module and simulated it without issue. >> >> Then next thing I did was to create a second OOT module and name it nd_fft. >> So the same generic OOT module with a different name. That too simulated >> without issue. >> >> So now what I wanted to do was to take the stock FFT and place it into my >> new module. So I took the RTL and the test. I then tried to simulate and >> the error that came back was that module axi_fft was unresolved. So the top >> level model did build, but the underlying IP was not in the search path. >> >> Based on what you are saying, I kind of expected that the axi_fft should >> have been in the default search path already. Would you say that was >> unexpected behavior for the standard OOT module? >> >> I will look at your bullets below and provide feedback tonight. I see what >> you are saying about modifying the .xci. Am I supposed to copy the axi_fft >> IP to this ejk43/rfnoc-ootexample path to make it local? I am guessing that >> bullet 2, could be a path back to the original IP so I don’t have to copy >> it. >> >> >> >>> On Sep 14, 2018, at 8:20 AM, Jon Pendlum <jon.pend...@gmail.com >>> <mailto:jon.pend...@gmail.com>> wrote: >>> >>> Hi Rich, >>> >>> The standard Ettus in-tree Vivado IP, which includes the axi_fft, is >>> automatically included. You do not need to do anything. Have you went >>> through the RFNoC getting started guide >>> (https://kb.ettus.com/Getting_Started_with_RFNoC_Development >>> <https://kb.ettus.com/Getting_Started_with_RFNoC_Development>)? I think >>> that will help you understand the FPGA build process. The key concept to >>> understand is that building the FPGA is separate from building your OOT >>> module. The FPGA build Makefile exists in the Ettus FPGA repo and pulls in >>> files from that repo. That is why you do not need to include any Ettus >>> in-tree files, the Makefile will include them automatically. >>> >>> When you get to the point of adding your custom IP, you need to do these >>> things: >>> 1) Use this IP as a template on how to add your IP: >>> https://github.com/ejk43/rfnoc-ootexample/blob/master/rfnoc/ip/complex_to_magphase_oot/ >>> >>> <https://github.com/ejk43/rfnoc-ootexample/blob/master/rfnoc/ip/complex_to_magphase_oot/>. >>> It is usually as simple as adding your .xci file and some renaming. >>> 2) Add your IP to this file: >>> https://github.com/ejk43/rfnoc-ootexample/blob/master/rfnoc/ip/Makefile.inc >>> <https://github.com/ejk43/rfnoc-ootexample/blob/master/rfnoc/ip/Makefile.inc> >>> 3) Make sure you have this line: >>> https://github.com/ejk43/rfnoc-ootexample/blob/master/rfnoc/Makefile.inc#L6 >>> <https://github.com/ejk43/rfnoc-ootexample/blob/master/rfnoc/Makefile.inc#L6> >>> 4) Use uhd_image_build_gui to import your OOT module and build your >>> bitstream. See the RFNoC getting started guide. >>> >>> >>> Jonathon >>> >>> On Fri, Sep 14, 2018 at 10:40 PM Rich Maes via USRP-users >>> <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote: >>> So I have looked at the ejk43/rfnoc-ootexample and I have been trying to >>> apply what I think I am seeing. Truth in advertising, I an FPGA engineer, >>> and I don’t usually get into Makefiles or CMakeLists.txt very much. >>> >>> I think the correct thing to do is to modify the CMakeLists.txt so that >>> when cmake is run, the the new Makefiles are generated with the correct >>> content. >>> >>> All I want to do, I believe right now is pull in the axi_fft IP. My next >>> will be to follow the advice of one of the respondents and build the IP >>> local to the OOT module, but I am still not certain how I am suppose to >>> reference it correctly. Just trying to get a list of what needs to be >>> touched to get the standard OOT to look an IP directory. >>> >>> What I have done is this: >>> >>> modify this line to include FFT >>> set(GR_REQUIRED_COMPONENTS RUNTIME FFT) >>> >>> and then later, I included this chunk in my >>> ~/rfnoc/src/rfnoc-nd_fft/CMakeLists.txt file >>> >>> ######################################################################## >>> # Setup CPack components >>> ######################################################################## >>> include(GrPackage) >>> CPACK_SET(CPACK_COMPONENT_GROUP_FFT_DESCRIPTION "GNU Radio FFT Blocks") >>> >>> CPACK_COMPONENT("fft_runtime" >>> GROUP "FFT" >>> DISPLAY_NAME "Runtime" >>> DESCRIPTION "Runtime" >>> DEPENDS "runtime_runtime" >>> ) >>> >>> CPACK_COMPONENT("fft_devel" >>> GROUP "FFT" >>> DISPLAY_NAME "Development" >>> DESCRIPTION "C++ headers, package config, import libraries" >>> DEPENDS "runtime_devel" >>> ) >>> >>> CPACK_COMPONENT("fft_python" >>> GROUP "FFT" >>> DISPLAY_NAME "Python" >>> DESCRIPTION "Python modules for runtime; GRC xml files" >>> DEPENDS "runtime_python;fft_runtime" >>> ) >>> >>> CPACK_COMPONENT("fft_swig" >>> GROUP "FFT" >>> DISPLAY_NAME "SWIG" >>> DESCRIPTION "SWIG development .i files" >>> DEPENDS "runtime_swig;fft_python;fft_devel" >>> ) >>> >>> ######################################################################## >>> # Add subdirectories >>> ######################################################################## >>> add_subdirectory(include/gnuradio/fft) >>> add_subdirectory(lib) >>> if(ENABLE_PYTHON) >>> add_subdirectory(swig) >>> add_subdirectory(python/fft) >>> add_subdirectory(grc) >>> endif(ENABLE_PYTHON) >>> add_subdirectory(docs) >>> >>> ######################################################################## >>> # Create Pkg Config File >>> ######################################################################## >>> configure_file( >>> ${CMAKE_CURRENT_SOURCE_DIR}/gnuradio-fft.pc.in >>> <http://gnuradio-fft.pc.in/> >>> ${CMAKE_CURRENT_BINARY_DIR}/gnuradio-fft.pc >>> @ONLY) >>> >>> install( >>> FILES ${CMAKE_CURRENT_BINARY_DIR}/gnuradio-fft.pc >>> DESTINATION ${GR_LIBRARY_DIR}/pkgconfig >>> COMPONENT "fft_devel" >>> ) >>> >>> >>> >>> I also added this because cmake complained that it could not find >>> GnuradioConfig.cmake >>> >>> install(FILES ../../../../src/gnuradio/GnuradioConfig.cmake >>> DESTINATION ${CMAKE_MODULES_DIR}/gnu_radio >>> ) >>> >>> >>> >>> _______________________________________________ >>> USRP-users mailing list >>> USRP-users@lists.ettus.com <mailto:USRP-users@lists.ettus.com> >>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> <http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com> >> > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com <mailto:USRP-users@lists.ettus.com> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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