Hi Dario, The generation of the IP should be the same in tree and out of tree, so it is strange that the netlist simulation file isn't generated for you. I'd like to try it to see if I get that behavior, but I'm currently traveling so it might be a while before I am able to.
I wanted to let you know though that I simulated complex_multiplier in an OOT block with Vivado recently without issue, so I know it can work. Like Jonathon said, Vivado can sometimes be finicky. A minor change to your code might allow it to work. Often when Vivado crashes, I remove the offending code and add it back incrementally until I can find out what's causing Vivado to crash. I am usually able to find a workaround that way. Thanks, Wade On Sun, Nov 22, 2020 at 2:21 PM Dario Pennisi via USRP-users < usrp-users@lists.ettus.com> wrote: > i did some step forward. it looks like in the build directory there's a > file called complex_multiplier_sim_netlist.v that allows simulation however > when calling the simulation from an OOT directory the IP is rebuilt under > that directory and that file is not created. > unfortunately the sim/complex_multiplier.vhd being created is not usable > as it causes the simulator to crash. > any suggestions on how to have this done by the simulation makefile? > > thanks, > Dario > > On Sat, Nov 21, 2020 at 8:43 PM Jonathon Pendlum < > jonathon.pend...@ettus.com> wrote: > >> Hi Dario, >> >> Unfortunately, Vivado's xsim simulator sometimes crashes when it runs >> into syntax and elaboration errors. Make sure you don't have issues like >> signals with multiple drivers, undriven signals, missing reset logic, >> typos, etc. Note that these issues may be in code that is/seems unrelated >> to the cmul instantiation. >> >> Also, if you have access to ModelSim, I would highly suggest trying that >> tool instead as it is far more robust than xsim. You can use the vsim make >> target to use ModelSim. >> >> Jonathon >> >> On Sat, Nov 21, 2020 at 5:54 AM Dario Pennisi via USRP-users < >> usrp-users@lists.ettus.com> wrote: >> >>> Hi, >>> i'm trying to simulate a block where i'm using cmul. in order to have >>> that compiled in i am including the following in my Makefile under >>> rfnoc/fpga in my OOT directory: >>> >>> include $(BASE_DIR)/../lib/ip/Makefile.inc >>> SIM_SRCS = $(abspath rfnoc_block_demod_tb.sv) \ >>> $(LIB_IP_COMPLEX_MULTIPLIER_OUTS) \ >>> >>> i tried also adding this to DESIGN_SRCS but when running simulation with >>> Vivado 2019.1 i see the following error: >>> >>> ERROR: [XSIM 43-3983] Internal Compiler error encountered while >>> processing aggregate association. >>> ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. >>> Exiting... >>> >>> if i remove cmul instance from my design simulation works. >>> >>> can you please shed some light on how to fix this? >>> thanks, >>> >>> Dario Pennisi >>> _______________________________________________ >>> USRP-users mailing list >>> USRP-users@lists.ettus.com >>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> >> > > -- > Dario Pennisi > ipTronix S.r.l. > > Tel +39 06 66183814 > Fax +39 06 66188420 > Mobile +39 335 6878904 > Web www.iptronix.com > <https://urldefense.com/v3/__http:/www.iptronix.com__;!!KXGHL9MWuGc!s5Tn7AzcrRbHxw-tqBwTDmxvGjHnCEyM7Hgx2K_iBSRF5MT3mAq3Hf-oopBP-dAa$> > > The information contained in this message is confidential and may be > legally privileged. The message is intended solely for the addressee(s), if > you are not the intended recipient, you are hereby notified that any use, > dissemination or reproduction is strictly prohibited and may be unlawful. > If you are not the intended recipient please contact the sender by return > e-mail and destroy all copies of the original message. > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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