Hi Jeff,

RFNoC3 / UHD 3.15 does not support metadata. That is a new feature in
RFNoC4 / UHD 4.0, so option 2 is not possible.

If you want to send out metadata in RFNoC3, I would suggest prepending it
to packets you send to AXI wrapper. You can still use SIMPLE_MODE as long
as you are producing a packet for every packet consumed. The different
input/output packet lengths do not matter as AXI wrapper internally
calculates the output packet length and updates the header automatically.

Jonathon

On Fri, Dec 11, 2020 at 3:48 PM Hodges, Jeff via USRP-users <
usrp-users@lists.ettus.com> wrote:

> I meant rfnoc_create_verilog.py
>
>
>
> https://github.com/EttusResearch/uhd/blob/master/host/utils/rfnoc_blocktool/rfnoc_create_verilog.py
>
>
> jeff
> ------------------------------
> *From:* Hodges, Jeff
> *Sent:* Friday, December 11, 2020 3:44:41 PM
> *To:* usrp-users@lists.ettus.com
> *Subject:* RFNoC passing metadata on the dataplane
>
>
> I'd like to pass metadata over the dataplane using the available space in
> the CHDR header.  However, I cannot find an easy way to do this using
> UHD3.15.
>
>
> I've identified two possible approaches but I'm not sure either will work:
> (1) Set AXI_Wrapper (Simple_Mode =0) to require user provided CHDR header.
> It's unclear how to provide the header, and if this can be modified quickly.
>
> (2) Expose the AXI-Stream CHDR interface the way UHD4.0 does it:
>
> In UHD4.0 the verilog_image_builder.py includes the options to expose HDL
> interface:
>
> o Definition: Which HDL interface to expose
> o Options: “AXI-Stream CHDR” (axis_chdr), “AXI-Stream Payload Context”
> (axis_pyld_ctxt), or “AXI-Stream Data” (axis_data)
>
> If Option (2) is the recommended, can I just copy the code from
> verilog_image_builder.py TEMPLATE such as below, or were other changes made
> to make it incompatible with 3.15?
>
>  %if config['data']['fpga_iface'] ==
> "axis_pyld_ctxt":
> assign axis_data_clk =
> ${config['data']['clk_domain']}_clk;
> assign axis_data_rst =
> ${config['data']['clk_domain']}_rst;
>  <%include file="/modules/axis_pyld_ctxt_modules_template.mako"/>
>
>
>
> Thanks,
>
> Jeff
>
>
>
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