I hope SystemVeilog support too.
It should be independent of Verilog.

2013年8月14日水曜日 23時38分30秒 UTC+9 Bram Moolenaar:
> Kocha wrote:
> 
> 
> 
> > Hi Bram,
> 
> > 
> 
> > I am always using a language called SystemVerilog at work.
> 
> > However, I very regret that there is nothing to Syntax of the standard of 
> > Vim.
> 
> > Would you add to the standard of Vim, if it can do? 
> 
> > 
> 
> > This is my first post and my first time creating vim syntax files, so
> 
> > please feel free to correct my approach to either. 
> 
> 
> 
> Thanks.  I'll leave it up to other SystemVerilog users to comment.
> 
> 
> 
> 
> 
> -- 
> 
> From "know your smileys":
> 
>  (:-# Said something he shouldn't have
> 
> 
> 
>  /// Bram Moolenaar -- b...@moolenaar.net -- http://www.Moolenaar.net   \\\
> 
> ///        sponsor Vim, vote for features -- http://www.Vim.org/sponsor/ \\\
> 
> \\\  an exciting new programming language -- http://www.Zimbu.org        ///
> 
>  \\\            help me help AIDS victims -- http://ICCF-Holland.org    ///

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