On Wed, Nov 19, 2014 at 12:12:04PM -0500, Lennart Sorensen wrote:
> On Tue, Nov 18, 2014 at 04:39:31PM -0500, Lennart Sorensen wrote:
> > TI seems to be on a 'Get it mainlined' kick lately, so perhaps they are
> > being more careful as a result.
> >
> > > Anyway, this is not a good solution, this is clearly something that
> > > nobody tests, thre is no reason to expect it what we would expect to
> > > dot.
> >
> > I see this 'hack' in the omap timer code:
> >
> > +#ifdef CONFIG_IPIPE
> > + if (ipipe) {
> > + u32 l;
> > +
> > + l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
> > + l = (0x3 << 8) | (l & (1 << 5)) | (0x1 << 3) | (1 << 2);
> > + __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
> > + }
> > +#endif
> >
> > Sure would be nice if someone had actually defined what those bits are,
> > although it appears to be setting wakeup on, and idle mode to 'no idle',
> > and I didn't look up the 5 and 8 bits yet.
> >
> > I was hoping to do something a lot cleaner than that.
>
> Well this works for me:
>
> Index: linux-3.12.31.rr1/arch/arm/mach-omap2/omap_hwmod.c
> ===================================================================
> --- linux-3.12.31.rr1.orig/arch/arm/mach-omap2/omap_hwmod.c 2014-11-19
> 11:32:38.931715225 -0500
> +++ linux-3.12.31.rr1/arch/arm/mach-omap2/omap_hwmod.c 2014-11-19
> 12:08:45.575792706 -0500
> @@ -2587,6 +2587,8 @@
> oh->flags |= HWMOD_INIT_NO_RESET;
> if (of_find_property(np, "ti,no-idle", NULL))
> oh->flags |= HWMOD_INIT_NO_IDLE;
> + if (of_find_property(np, "ti,no-smart-idle", NULL))
> + oh->flags |= HWMOD_SWSUP_SIDLE;
> }
>
> oh->_state = _HWMOD_STATE_INITIALIZED;
>
> combined with adding to the dts:
>
> &gpio7 {
> ti,no-smart-idle;
> };
>
> I think I like that as a simple clean solution.
>
> Now the SYSCONFIG register is 0x0009 (no idle + autoidle) rather than
> 0x001d (smart idle with wakeup enabled + autoidle)
I do not know what to say. At software level, it is not really hard
to get the I-pipe code to trigger a write to a register when the
first RT irq is enabled in a bank and another write when the last RT
irq gets disabled, because we keep track of that in the
enable_irqdesc/disable_irqdesc callbacks.
Now, I suspect hwmod is made to be transparent, and called when
initializing the bank, way before an irq is enabled, so the
behaviour can not really be influenced from enable_irqdesc/disable_irqdesc.
--
Gilles.
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