to the list.
Thanks for all the continued development and collaboration.
Regards
Wesley New
SARAO
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Hi Kaj,
There is generally a requirements.txt in the root of the mlib_devel which
should list any python dependencies and appropriate versions. I am not sure
how well this is kept uptodate though.
Regards
Wes
On Mon, Feb 21, 2022 at 1:24 PM Kaj Wiik wrote:
> Hi Adam,
>
> I am sorry but I
Hi June,
Over what ethernet interface are you connecting to the SKARAB? 1GbE or
40GbE. IIRC the boot firmware comes with both a 1gbe and 1 of the 40gbe
interfaces built in. The designs you mention would only have the 1 or more
40gbe ethernet interfaces included. You would see the symptoms you are
Hi Mutsuo,
There was a small team that added support for the first 2 red pitaya boards
to be used as cheap tutorial hardware for evaluation of the CASPER tools.
The nature of CASPER is one of open-source and collaboration.
Unfortunately many of us won't have the time to focus on making a port for
As someone who has tried plenty of combinations of Matlab, Xilinx and OS
versions over the years with varying success. I would recommend installing
a VM with the supported versions. If you are keen to maximize compile
resources try using lxc or chroot.
Good luck.
On Tue, 30 Jun 2020, 10:55 PM
script
>>>> and run your tasks that way. If I remember correctly tcpboprhserver can
>>>> address a register by name so you shouldnt need to worry about memory maps,
>>>> but if you are you can look at the fpg file that you uploaded and the
>>>> header
address a register by name so you shouldnt need to worry about memory maps,
but if you are you can look at the fpg file that you uploaded and the
header will contain the memory map. You can also see the memory map in a
file called coreinfo.tab in your build directory.
Hope this helps.
Wesley New
South
.
Regards
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Wed, Jan 15, 2020 at 9:42 AM David Mc Carthy
wrote:
> Thanks.
> On 1/14/20 11:25 PM, Adam Isaacson wrote:
>
> Hi David,
>
> This will also help you setup your sd card on the red pitaya
Please use the supported version as listed here in the
documentation otherwise it is really hard to support.
https://casper-toolflow.readthedocs.io/en/latest/src/Installing-the-Toolflow.html
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Fri, Dec 13, 2019 at 4:46 AM
Hi Nitish
This is a python 2/3 issue. The toolflow has been upgraded to use python 3.
Most people are running it in a virtual environment and install the
requirements.txt in the root of mlib_devel. Assuming you are using the
latest version of mlib_devel in casper-astro.
Hope this helps.
Regards
n that can be opened in Vivado and
perused at ones leisure.
Please let me know if there are any other questions.
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, Mar 7, 2019 at 12:06 PM Alex Bassios wrote:
> Hi Adam/Jason/Wesley
>
>
>
> Andrea Melis from
and check if it mounts correctly and the boot partition is there.
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Wed, Aug 29, 2018 at 12:21 PM, Nivek Ghazi
wrote:
> Hey Casper people,
>
> So, I recently got a raspberry pi 3 b+ and looking to get it working
> w
to add the functionality and we will support you as best we can.
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, Jul 6, 2017 at 2:27 PM, Clifford van Dyk <cliffordvan...@gmail.com>
wrote:
> Hi Mark (and Wes)
>
> For clarity (and at ri
can pull up some test model files where we send and
receive data between 2 networked SKARABs. With functionality to configure
data rates and packet sizes etc.
Regards
Wes
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Wed, Jul 5, 2017 at 10:46 PM, Peryer, Mark
/usr/local/bin/glnxa64/MATLAB’: No such file or directory
Ill update the documentation accordingly.
Regards
Wes
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Wed, Jun 21, 2017 at 7:24 PM, Peryer, Mark A. <
mark.per...@cfa.harvard.edu> wrote:
> Hi Wesley,
&
Hi Mark,
The jasper_vivado_2016_2 is an older branch that has now been merged into
Master. There are a lot of changes that have happened subsequent to that in
master. So please use Master to rebuild the fpg file and try to program
again.
Ill remove that old branch shortly.
Regards
Wes
Wesley
= casperfpga.CasperFpga(SKARAB_IP)
skarab.upload_to_ram_and_program(SKARAB_FPG)
Does the board come back after waiting some time?
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Wed, Jun 14, 2017 at 7:16 PM, Peryer, Mark A. <
mark.per...@cfa.harvard.edu> wrote:
> Hello,
Hi Adam,
This probably wouldn't work off-the-bat. You would need to make changes to
the controller. If you need to read the data back via the PPC, then you
would need to expand this interface as last time I checked it only
supported 2GB of the DIMM.
Regards
Wesley
Wesley New
South African SKA
Hi Claudio,
2012b does not support the newer slx file format. Try using an older
version of the tutorials with an mdl file.
You can try the mdl files from this commit:
https://github.com/casper-astro/tutorials_devel/tree/c195b501f67c4f2a4f051f258453e0751f9825fa/tut3
Wesley New
South African SKA
imilar to tut3.py to control the design and to
read the snap block over the network, as well as plot your data.
Regards
Wes
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Tue, Oct 18, 2016 at 8:22 AM, Heystek Grobler <heystekgrob...@gmail.com>
wrote:
> Hi Wes
Hi Gunter,
Also take a look at xps_base/XPS_ROACH2_base/system.xmp
There is an option for ShiftReg. I have not played with it myself, but it
might be what you are looking for.
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, Jul 7, 2016 at 5:49 PM, David MacMahon
Hi Mike,
This one got me a while back. I think you need to change the style option
in your mpd file to hdl. See page 47 of this document.
http://www.xilinx.com/support/documentation/sw_manuals/edk10_psf_rm.pdf
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
pcores, you would just
have to change the bus widths and the memory mapping.
Hope this puts you on the right path.
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, Apr 7, 2016 at 12:23 PM, Mike Movius <mi...@reutech.co.za> wrote:
>
> Hi A
to not give this error for your version by
editing this file
<https://github.com/ska-sa/mlib_devel/blob/master/xps_library/casper_xps.m>and
between lines 56 and 80.
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Wed, Apr 6, 2016 at 1:07 PM, Louise Forbe
edu/wiki/MSSGE_Setup_with_Xilinx_14.x_and_Matlab_2012b>
.
Also please cc the casper mailing list on any questions as they will be of
use to others in the community. casper@lists.berkeley.edu You will need to
subscribe before being able to send to the list.
Regards
Wesley
Wesley New
South Afric
:
The syntax in the Xilinx Perl scripts is not supported under the Ubuntu
default shell Dash. Change the symbolic link sh -> dash to sh -> bash:
- cd /bin/
- sudo rm sh
- sudo ln -s bash sh
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, Feb 11, 2016 at 12
Marc is correct. The ARP table is not involved in multicast. The multicast
MAC is just mapped from the multicast IP.
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, Nov 5, 2015 at 12:51 PM, Marc Welz <m...@ska.ac.za> wrote:
> David MacMhaon wrote:
>
on this repository between 100MHz and 200MHz.
Thanks
Wes
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Tue, Aug 4, 2015 at 11:41 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
Hi, Vereese,
That's a very curious failure mode! It's very interesting that everything
repository.
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Thu, May 28, 2015 at 3:13 AM, Homin Jiang ho...@asiaa.sinica.edu.tw
wrote:
Dear All:
Recently i found out the locations I/O pins for qdr2/ROACH2 are not in the
same FPGA area.(from the Planahead
of changes. One being that shifting the clock by 180
degrees so that the calibration range shifted by half a clock cycle and
this helped with getting it to calibrate at 300+MHz. I would assume you
would need to do the same but in the opposite direction.
Wes
Wesley New
South African SKA Project
+2721 506
I would also suggest upgrading to 14.7, it is a pretty straight forward
upgrade. Just install 14.7 and point your startsg script to the correct
installation directory.
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Fri, Apr 10, 2015 at 7:06 AM, Chaudhari Sandeep C.
s
/casper-astro/mlib_devel/blob/master/xps_base/XPS_ROACH2_base/pcores/mkadc_interface_v1_00_a/hdl/vhdl/adc5g_dmux1_interface.vhd
For more info on the MMCM see the Xilinx Clocking Resource users guide.
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7300
www.ska.ac.za
On Fri, Mar 6
will need to have a look as
the scripts that calculate and set the Multiply and Divide parameters on
the VCO.
Regards
Wes
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Thu, Feb 12, 2015 at 8:41 PM, Nishanth Shivashankaran nshiv...@asu.edu
wrote:
Hi All,
I am
Hi Kris,
Can you elaborate on your question?
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Wed, Feb 4, 2015 at 4:57 PM, Kristian Zarb Adami kris...@gmail.com
wrote:
Hello all,
has anyone implemented/know of an implementation of CAM inside the Casper
consortium
Can you elaborate on these errors?
A while ago the software registers were updated so you might have to
replace all of the software registers in you your design with the new on
from the library.
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Fri, Nov 7, 2014 at 3:55 AM
Try this:
source /opt/xilinx/14.3/ISE_DS/settings64.sh
then run the Xilinx Licence Config Manager
xlcm
From here you can choose your license file.
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Thu, Sep 11, 2014 at 6:01 PM, Andrea Giachero
andrea.giach
You should go to the 2nd tab Manage Licenses and the click on the Load
license button. This will tell you if the license is up to date and what
features it supports.
Hope this helps.
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Fri, Sep 12, 2014 at 2:26 PM, Andrea
Aspw
On 21 Aug 2014 23:19, Matt Strader mstra...@physics.ucsb.edu wrote:
Hi Casperites,
We (UCSB and Fermilab) are currently designing a new DAC/ADC board
(12bits x 2.0 Gsps ADC, 14bits x 2.5 Gsps DAC) to interface with the ROACH2
for readout of future, larger MKID instruments. The DAC/ADC
Wes
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Sun, Aug 17, 2014 at 7:25 AM, Wang Jinqing jqw...@shao.ac.cn wrote:
Hi,
I have started the Roach2 board with very simple counters .It seems goes
well. Now I want to use the
Tutorial 3: Wideband Spectrometer
Hi Pablo,
Multicast is only supported on ROACH2 and you will need to make sure that
your power pc is running the latest firmware.
Wes
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Mon, Jun 30, 2014 at 10:22 PM, Pablo Vasquez pvasq...@das.uchile.cl
wrote:
Hi All
Are all the boxes ticked in your casper_xps window?
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Thu, May 29, 2014 at 7:29 AM, John Ford jf...@nrao.edu wrote:
This can happen if your model is named using upper and lower case letters.
What's your model name?
John
chmod +x xsetup
On 13 May 2014 06:00, Rolando Paz flx...@gmail.com wrote:
Sorry Jack, the problem is attached :-)
It is a permissions problem :-)
what should I do?
Rolando Paz
2014-05-12 21:41 GMT-06:00 Jack Hickish jackhick...@gmail.com:
when you say it doesn't do anything...?
It
Here are links to the 2 cores that we use.
https://github.com/ska-sa/mlib_devel/tree/master/xps_base/XPS_ROACH2_base/pcores/kat_ten_gb_eth_v1_00_a
https://github.com/ska-sa/mlib_devel/tree/master/xps_base/XPS_ROACH2_base/pcores/ten_gb_eth_v3_00_a
Wesley New
South African SKA Project
+2721 506
Hi Norbert
Maybe share your gen_mhs.py file so that we can see the code that you are
trying to run.
Wes
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Thu, Feb 6, 2014 at 5:57 PM, Norbert Bonnici
norbert.bonnici...@um.edu.mt wrote:
Dear CASPERites,
I'm currently
Thanks Nie,
Ill add this to the
https://casper.berkeley.edu/wiki/MSSGE_Setup_with_Xilinx_14_and_Matlab_2012bpage
What OS are you using?
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Tue, Jan 14, 2014 at 4:57 AM, Nie Jun nie...@xao.ac.cn wrote:
Hi guys,
I
Hi David yes the ftdi chip hogs the bus. Ill send you a script to release
the jtag when I get into the office.
Regards
Wes
On 20 Nov 2013 21:53, DAVID SAROFF (RIT Student) dps7...@rit.edu wrote:
Does anyone have experience using chipScope with Platform Cable USB II on
roach2? I know it is not
You can run this script
https://github.com/ska-sa/roach2_support_software/blob/master/ftdi/scripts/release_jtag_port.py
You will need python and the ftdi libraries.
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Thu, Nov 21, 2013 at 7:49 AM, Wesley New wes...@ska.ac.za
Hi Rolando,
What repository are you using? Assuming that you are targeting an ibob,
mlib_devel has a tag for last support of the ibob and bee2. Are you using
this?
Wes
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Thu, Oct 24, 2013 at 7:41 PM, Rolando Paz flx
Hi Guys
I have never experienced this. Can you provide the versions of the tool and
OS you are running?
Wes
On 22 Oct 2013 20:51, Ryan Monroe ryan.m.mon...@gmail.com wrote:
I've also experienced these. The most common cause seems to be a constant
which is not sampled. I don't have a good
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Tue, Oct 1, 2013 at 2:02 PM, Jack Hickish jackhick...@gmail.com wrote:
Hi all,
We were using 14.3 at the JBO workshop a few weeks ago -- partly because
of cautionary tales I heard about 14.4, and partly because
So bee_xps has been changed to casper_xps and the casper mlib_devel will
reflect that when we update it for this years tutorials for the the CASPER
workshop.
If you are using the old libraries, just run bee_xps otherwise use run
casper_xps
Wesley New
South African SKA Project
+2721 506 7365
Hi Joe,
That error should actually be a warning. It doesnt stop you from compiling
designs. There is something else not right with your setup.
Have a look at the startsg script in the root of the mlib_devel directory
and check that you are setting all those environment variables correctly.
Thanks Timothy, I have updated that wiki page.
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Fri, Aug 16, 2013 at 11:40 PM, John Ford jf...@nrao.edu wrote:
Folks
It seems that the libraries listed on
https://casper.berkeley.edu/wiki/Repositories
are all
to slow. The
best way is to packetize the data and sent it over either 10Gig or 1Gig
ethernet to a server for storage or further software/GPU processing.
Hope this helps.
Regards
Wesley
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Wed, Jul 24, 2013 at 7:35 PM, David
This is great work JP.
Out of interest is anyone else planning to use the DDR3 on ROACH2?
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Wed, Jul 24, 2013 at 8:24 AM, Juan-Pierre Jansen van Rensburg
jvrensburg...@gmail.com wrote:
Hi all
I have been working
be read from the PPC.
Thanks,
Matthew
On Wed, Jul 24, 2013 at 11:48 AM, Wesley New wes...@ska.ac.za wrote:
This is great work JP.
Out of interest is anyone else planning to use the DDR3 on ROACH2?
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Wed, Jul 24
.
Wes
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Wed, Jul 10, 2013 at 10:49 AM, Alex Zahn avzah...@gmail.com wrote:
Hi all,
A bit of a picky question:
The wiki mentions Ubuntu 12.04 and RHEL 6 as compatible with ISE 14. Does
anyone know of any other linuxes
at it.
Haoxuan you could try commenting out most
of xps_base/XPS_ROACH_base/etc/fast_runtime.opt and then also stop bitgen
from running.
Wesley New
South African SKA Project
+2721 506 7365
www.ska.ac.za
On Tue, Jul 2, 2013 at 5:25 AM, Ryan Monroe ryan.m.mon...@gmail.com wrote:
Wait until
Hi Andrea
I have simulated the sync pulse with out any issues on the latest version
of the ska-mlib_devel libraries with matlab 2012b and Xilinx 14.4
I have taken your design and put a scope on the output of the OR block and
it looks fine.
Regards
Wes
On Thu, Apr 4, 2013 at 9:15 AM, Andrea
Hi Shaman,
In Linux we have to source the settings/64.sh file in the Xilinx install
directory before we can start any of the Xilinx tools. This sets the
correct paths and environment variables. There may be a similar script for
windows.
Wes
On Tue, Mar 26, 2013 at 8:55 AM, sha...@rri.res.in
On Tue, Mar 26, 2013 at 10:48 AM, sha...@rri.res.in wrote:
I cannot use the latest version. Now, after re-installing, I am not
getting the previous setup error.
I am trying a basic simulink model and it is getting compiled and I can
observe the ouput.
So the design compiles all the way
Hi Glenn,
We are running many bof files with that change and are doing plenty of
register and bram reads and writes and have not experienced any issues with
these bus accesses. What version of TCPBorphServer are you running?
Wes
On Fri, Mar 15, 2013 at 3:28 PM, G Jones glenn.calt...@gmail.com
register
option. The Xilinx BRAM pcore that is currently used for data width of 32
does not support that option, but it would greatly helps with timing (and
therefor placement) as the clock-to-out time for the UNregistered BRAM is
2 ns!
Dave
On Mar 12, 2013, at 10:54 AM, Wesley New wrote
The new TCPBorphServer 3 supports a compressed (gzip) boffile so I have
updated the SKA-SA CASPER tools to compress the bof file using gzip for all
roach2 compiles. This is also placed in the bit_files directory.
So if you are running TCPBorphServer 3 on your roach 2 you will now be able
to use
Hi Jason,
It looks like you may have built the bof file with an older version of the
CASPER tools. We had a similar problem with the infrastructure being held
in reset and hence TCPBorphServer timed out on bus requests. Have you
pulled the latest version from SKA-SA?
You can try the precompiled
Hi Andrea
I have just updated xps_library/casper_xps.m to support Xilinx version
14.4. If you pull from ska-sa mlib_devel you will get the change.
Regards
Wes
On Fri, Mar 1, 2013 at 5:42 PM, Andrea Mattana matt...@ira.inaf.it wrote:
Hi all,
I have installed the new toolflow having MATLAB
Hi Jonathon,
The easiest way to do this is through and ADC. If you arent using an ADC on
the board then you will need to make some tweaks to the tools. We dont
support this at the moment but it shouldnt be hard to add it.
You could implement this in a couple of ways:
It could be done in the the
Hi Jason,
I think Mo had different Kingston DIMMs which are not 1gig, but the
supplier claims that they are compatible. We have to be very careful when
choosing the DIMM as we can only support a few different modules as the
gateware controller has the SPD information hard coded.
I am unsure of
Good Day Casperites,
Since the release of the upgraded
librarieshttps://github.com/ska-sa/mlib_develto support the ISE 14
tools, there have been questions about which versions
are still supported.
It is recommended that you use the latest version of the
It looks like your licence is for the wrong hostid, I think this is
the mac address. You could either regenerate the licence on the Xilinx
site or you could set up a face eth0 interface..
On 10/22/12, Nestor Lasso Cabrera nes...@astro-udec.cl wrote:
Dear Mr. or Mrs.,
I'm trying to run the
Hi Katty,
Here are some similar threads that are in the mailing-list history.
http://www.mail-archive.com/casper@lists.berkeley.edu/msg02980.html
http://www.mail-archive.com/casper@lists.berkeley.edu/msg02982.html
Basically, the OPB cores have been deprecated in the later Xilinx tools and
need
for could be
dangerous e.g ADCs. Ideally people would help out with yellow blocks
they have hardware for and have expertise in.
Regards
Andrew
On Wed, 2012-10-03 at 13:29 +0200, Wesley New wrote:
Hi Dave,
Unfortunately the move to wishbone will need to be done en mass.
Wes
Hi Kath,
If you look in the bee_xps.m script you will see a list of supported
versions. It seems that get_xlVersion('full') only returns the version in
the format xx.y and not xx.y. any more. I would suggest that you edit
the script to support this version.
Regards
Wes
On Tue, Oct 9, 2012
Change: case {'13.1.'}
To: case {'13.1'}
No period after the 1 :)
Wes
On Tue, Oct 9, 2012 at 4:22 PM, Rurik A. Primiani
rprim...@cfa.harvard.eduwrote:
Hi Katherine,
In your email you say you installed Matlab R2009b and Xilinx 13.1. These
versions are not compatible according to
ADCs. Ideally people would help out
with yellow blocks
they have hardware for and have expertise in.
Regards
Andrew
On Wed, 2012-10-03 at 13:29 +0200, Wesley New wrote:
Hi Dave
On Sep 27, 2012, at 10:23 AM, Wesley New wrote:
Hi Rurik
These updates don't contain the wishbone port, that is the next item
on my to-do list.
Wes
On 9/27/12, Rurik A. Primiani rprim...@cfa.harvard.edu wrote:
Hi Wes,
Great work! I look forward to using the newer tools. Just
to the Wishbone bus
discussed at the workshop?
Best,
Rurik
On 9/26/12 9:01 AM, Wesley New wrote:
Good Day all,
We have updated the existing MSSGE toolflow to work with the Xilinx 14.2
tools and Matlab2012a. I have provided a wikipage with all the details
and how to get an environment setup
Hi Dave, thanks for your comments.
On Tue, Sep 4, 2012 at 5:28 PM, David MacMahon dav...@astro.berkeley.eduwrote:
Hi, Wes,
Thanks for taking on this effort! Here are a few comments:
On Sep 3, 2012, at 4:43 AM, Wesley New wrote:
Removing the following yellow blocks:
XAUI - Only
Good Day All,
I am writing to provide a heads-up with regards to the clean up of the
toolflow.
The idea is to remove support for the older hardware platforms (iBOB, BEE2
and CORR) as they are no longer supported by Xilinx tools after 10. We will
provide a tag to the version of the tools which
Great work guys. We are planning porting the libraries to 14.1 as soon
as possible and I'm sure we will encounter more similar issues.
Wes
On 7/21/12, Rurik A. Primiani rprim...@cfa.harvard.edu wrote:
Digging into this further it appears that a combination of integer
division and
the 13.x
Hi Rich,
As an aside, we have recently put the repository with all the roach 1
and 2 hardware files onto github, search for ska-sa and and feel free
to browse through the repos. I will send you a link as soon as I get
to a computer.
Regards
Wes
On 2/10/12, Rich Lacasse rlaca...@nrao.edu wrote:
Hi Miguel,
My suggestion would be to setup your default values for software registers
in an initial design config section of your software.
Regards
Wesley
On Mon, May 30, 2011 at 11:41 PM, Miguel migu...@gmail.com wrote:
Hi everybody,
It is possible set a software register with a default
.
For more information and testing instructions see:
http://casper.berkeley.edu/wiki/ROACH_DDR2_Memory_Modules
Regards
Wesley New
Hi Chao-Te
As for your 2nd point. I have updated the tut2.py script to fix the
programming issue.
Turns out when there is no boffile specified in the arguments, it passed an
empty string to the progdev function.'
An svn update should solve this issue now.
Regards
Wesley
On Tue, Feb 15, 2011
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