[Public]

Reviewed-by: Prike Liang <[email protected]>

Regards,
      Prike

> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of Alex
> Deucher
> Sent: Saturday, October 11, 2025 5:15 AM
> To: [email protected]
> Cc: Deucher, Alexander <[email protected]>
> Subject: [PATCH 6/7] drm/amdgpu: Update AMDGPU_INFO_UQ_FW_AREAS
> query for sdma
>
> Add a query for sdma queues.  Userspace can use this to query the size of the 
> CSA
> buffers for sdma user queues.
>
> Signed-off-by: Alex Deucher <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 26 +++++++++++++++++++++++++
>  include/uapi/drm/amdgpu_drm.h           |  8 ++++++++
>  2 files changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index f368bda40be41..51af7b893f482 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -409,6 +409,24 @@ static int amdgpu_userq_metadata_info_compute(struct
> amdgpu_device *adev,
>       return ret;
>  }
>
> +static int amdgpu_userq_metadata_info_sdma(struct amdgpu_device *adev,
> +                                        struct drm_amdgpu_info *info,
> +                                        struct 
> drm_amdgpu_info_uq_metadata_sdma
> *meta) {
> +     int ret = -EOPNOTSUPP;
> +
> +     if (adev->sdma.get_csa_info) {
> +             struct amdgpu_sdma_csa_info csa = {};
> +
> +             adev->sdma.get_csa_info(adev, &csa);
> +             meta->csa_size = csa.size;
> +             meta->csa_alignment = csa.alignment;
> +             ret = 0;
> +     }
> +
> +     return ret;
> +}
> +
>  static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
>                            struct drm_amdgpu_info *info,
>                            struct drm_amdgpu_info_hw_ip *result) @@ -1385,6
> +1403,14 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct
> drm_file *filp)
>                       if (ret)
>                               return ret;
>
> +                     ret = copy_to_user(out, &meta_info,
> +                                             min((size_t)size, 
> sizeof(meta_info))) ? -
> EFAULT : 0;
> +                     return 0;
> +             case AMDGPU_HW_IP_DMA:
> +                     ret = amdgpu_userq_metadata_info_sdma(adev, info,
> &meta_info.sdma);
> +                     if (ret)
> +                             return ret;
> +
>                       ret = copy_to_user(out, &meta_info,
>                                               min((size_t)size, 
> sizeof(meta_info))) ? -
> EFAULT : 0;
>                       return 0;
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h 
> index
> 881e8cc986e2b..021ed8a49600e 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -1645,10 +1645,18 @@ struct drm_amdgpu_info_uq_metadata_compute {
>       __u32 eop_alignment;
>  };
>
> +struct drm_amdgpu_info_uq_metadata_sdma {
> +     /* context save area size for sdma6 */
> +     __u32 csa_size;
> +     /* context save area base virtual alignment for sdma6 */
> +     __u32 csa_alignment;
> +};
> +
>  struct drm_amdgpu_info_uq_metadata {
>       union {
>               struct drm_amdgpu_info_uq_metadata_gfx gfx;
>               struct drm_amdgpu_info_uq_metadata_compute compute;
> +             struct drm_amdgpu_info_uq_metadata_sdma sdma;
>       };
>  };
>
> --
> 2.51.0

Reply via email to