On 09/19/2014 08:55 AM, Slichter, Daniel H. wrote: > Sebastien has indicated that we are basically ready for a breakout > board from the KC705 to the existing DDS/TTL system, so that we can > start using the KC705 and new software to test and run our > experiments. I am willing to go ahead and design a daughterboard to > attach to the LPC FMC connector on the KC705 and break out into two > connectors compatible with our current daughterboard cables, so that > we can start talking to the existing DDS and TTL. This will mean > running the I/O single-ended from FPGA onto the daughterboard and > then translating to LVDS, as is done with the current system.
Those fat parallel buses are anachronistic, fragile, and technically inferior. I would go to high speed serial right away. Robert. _______________________________________________ ARTIQ mailing list https://ssl.serverraum.org/lists/listinfo/artiq
