Hi, > Those fat parallel buses are anachronistic, fragile, and technically > inferior. I > would go to high speed serial right away.
I heartily agree on all counts. However, for back compatibility with current DDS and TTL breakout boards I thought we should at least have the option. We can use commericial SCSI cables to improve the reliability over the current homemade ribbon cable method. Furthermore, I have done some looking into various chips to do serialization/deserialization to enable us to use high speed serial for the FPGA-DDS and FPGA-TTL connections. The issue is that almost all the chips I found have nondeterministic latencies from chip to chip, and I worry about all the effort we are putting in to making a nice RTIO core if in the end we are limited by the performance of the deserialization at the end (jitter of +/- 1 slow (parallel) clock cycle is a typical spec as well). If we are able to find a suitable technical solution for the SERDES, my thought for high speed serial would be to use DisplayPort connectors and cables, which have 4 differential pairs and can be used for long (3 m) runs at full bandwidth (~8 Gbit/s for DisplayPort 1.0, more than we likely need). There exist chipsets which implement specific SERDES protocols (e.g. HDMI, DisplayPort) but the latencies and jitter associated with these are even worse. For the applications for which they are used, there just isn't much incentive to care about absolute timing to the degree we need. To Sebastien's point: > Why not drive the LVDS signals directly from the FPGA? If doing that I suggest > adding some low-capacitance ESD protection/TVS devices (e.g. > those designed for HDMI or USB such as RClamp0524P) on the > daughterboard, as the FPGA is much more expensive to replace than the > buffers. The only reason for single-ended is that we don't have enough differential pairs on the LPC FMC connector for our requirements (44 needed for current DDS/TTL system, 38 available). I thought that using the LPC FMC connector for the "core" DDS and TTL lines would be best, since then we have the HPC connector free to connect a daughterboard for whatever other desired peripherals, and thus we are leaving more lines open to be utilized there. Best, Daniel _______________________________________________ ARTIQ mailing list https://ssl.serverraum.org/lists/listinfo/artiq
