On 2017-05-11, at 12:42, John McKown wrote: > On Thu, May 11, 2017 at 1:34 PM, Gibney, Dave <gib...@wsu.edu> wrote: > >> In days of limited storage, sure. But, today, why not >> DC X'' >> DC C'I blew up here because the moon is blue' >> > Looks nice. I'd probably do > DC H'0',C'FIXME: YOU DID SOMETHING WEIRD AND I''M CONFUSED.' > Once, under a severe resource constraint, I wrote an error reporting routine that just printed out its return address, leaving the user to refer to the assembler listing to see a comment describing the error.
The developer was half the user base. The other half frowned, but tolerated it. I believe PDP-6 allowed EX *. Ooooh! The 0-instruction loop! EX must have been interruptible so a single mischievous job couldn't bogart the entire system. PDP-6 and PDP-10 had indirect addressing to arbitrary depth, but address generation was interruptible. I never got to try on PDP-10 an indirect addresing chain that threaded through a number of pages exceeding the size of real memory. On PDP-6, all instructions, registers, and memory locations were 36 bits. The first 16 memory locations were the GRs unless you paid extra for transistorized registers (in an outboard chassis!) One could copy a short loop into those registers and execute it there; DIY caching. CDC 3600 followed CDC 1604 which already had nearly fully populated instruction space, so 3600 provided a "modify next instruction" meta-instruction. I believe there were extended mnemonics for many of these. -- gil
