PL/I F and the OS PL/I "Optimizing" compiler certainly did.
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf of Farley, Peter x23353 [00000dc9d8785c29-dmarc-requ...@listserv.uga.edu] Sent: Tuesday, November 30, 2021 12:50 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Base-less macros And IIRC in ancient days the PL1 runtime used to use word 1 of the RSA for its own purposes. Don’t know if LE and Enterprise PL1 (or Enterprise COBOL for that matter) continued that tradition or not. Peter -----Original Message----- From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU> On Behalf Of Mark Hammack Sent: Tuesday, November 30, 2021 12:37 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Base-less macros I think it is one of those "better safe than sorry" things. If a prior subroutine call used this RSA in 31 bit mode, then 4(13) should be an address so the low order bit shouldn't be on (in theory). I remember a programmer using the first word of the RSA as temp storage...until some other subroutine (not in our control) either used it for some other reason. Not as bad as using the first 8 bits of an address for flags, but still a headache to correct. *Mark* On Tue, Nov 30, 2021 at 10:53 AM Seymour J Metz <sme...@gmu.edu> wrote: > Do you really need to test all four bytes? A test for 'SA' should be > enough. > > -- > Shmuel (Seymour J.) Metz > https://secure-web.cisco.com/1wByIrL2iO9P9S4db1cCVZXscFQOShonYtI1gJWgpwzr7CYH7vtTpGog3frTQmqikX6ZTLowl4IpW4Iw51hrCkrFYhlHiOwIGDNqo3a5iGtQ6rbHJFpuZdP8guWFzTdvmtt52rCKPUq6k6yBmmqXwFTWDsTq5SR3NoR668gVrK0VgjWnGE25ZJeiwaeBlV0Mpu_FRPt2eRSdo7R_z6VMXBf2aHvK2TnQFB3_P5NXIe_gya8NgtmgCz9Y45Lx1L02zkJDsPO86j_aScdWfditYe6M717aOzLYlV4-zCSbmmRMqf5NDM5b8GR9A0olHB3OQmIkVg-LcS2Ko4pllMt8YA7aAK1P5K4xyzVF7ehQvSuQIKe6Sy2Heg0M5R_QTK63qyvRWZehVa1hZlPKUDXvJovXV66pEcZrEsNcS5cW8DNn1gZQztbMGxpzDWMCRahhAVJOKpAVrwyuuR-36MVln_w/https%3A%2F%2Furldefense.com%2Fv3%2F__http%3A%2F%2Fmason.gmu.edu%2F%2Asmetz3__%3Bfg%21%21Ebr-cpP > eAnfNniQ8HSAI-g_K5b7VKg!fJ-ZGLII6ou2tbp7J5r5YQxS_lMe78f778iGHf8Xyncavn > D8-EgiZR1MVewdjWfyRDQ-iA$ > > ________________________________________ > From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] > on behalf of Mark Hammack [mark.hamm...@gmail.com] > Sent: Tuesday, November 30, 2021 10:53 AM > To: ASSEMBLER-LIST@LISTSERV.UGA.EDU > Subject: Re: Base-less macros > > In our case, the caller doesn't "know" whether the called subroutine > is base 31 or base 64. So it is up to the called subroutine to "figure out" > whether the caller used a 72 byte save area or a 144 byte save area. > Parameters to the macro set addressing mode, RSA size, etc. This > allows for a 31 bit module to call a 64 bit subroutine and vice versa. > That's what I really mean by "switches between". The one caveat is > that the caller must provide a large enough area to allow for the 144 byte > area. > > Since some subroutines accept arguments in R0 and/or R1 (and > unfortunately assume other registers are pre-loaded) those can't be > touched before being saved. Likewise, if the routine is called from > another 64 bit subroutine, the high halves of registers are > (potentially) in use. However, since > (currently) all of our programs run below the bar, using the high half > of > R14 may be an option. I need to look into using a FPR or AR but the 4 > byte literal pool works for now. Storing R14 in 8(R13) is not a bad > idea either. > > Thanks! > > > > *Mark*
