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Pavel Roskin a écrit :
> On Thu, 2009-08-20 at 04:41 -0700, shashi raj singh wrote:
>> Hi Aditya
>>
>> I think by changing PLL control register setting u sud b able to
>> achieve your goal.(also u will require som sw changes) look in
>> reg.h of ath5k
>
> The question is not how to do it in the chipset.  The question is
> how to make it properly on all layers.  Should we use the same
> channel numbers for narrow bandwidth or different channels?  How
> should the userspace set the bandwidth?  Are there any regulatory
> considerations?  How can we integrate the new functionality
> smoothly with the already existing support for setting 40 MHz
> bandwidth for 802.11n?  How should the collision avoidance work?
>
> I think linux-wirel...@vger.kernel.org would be a better place to
> discuss it.  Once the design issues are resolved, ath5k would be
> probably the first driver to implement the narrow channels.
>
> But implementing a hack specific to ath5k won't be appreciated
> upstream.
>
Probably adding new values to the enum nl80211_channel_type might be a
good start?

I think
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