Both ath5k_hw and ath5k_softc represent one instance of the hardware.
This duplication is historical and is not needed anymore.
Keep the name "ath5k_hw" for the merged structure and "ah" for the
variable pointing to it. "ath5k_hw" is shorter than "ath5k_softc", more
descriptive and more widely used.
Put the combined structure to base.h where the old ath5k_hw used to be.
Move some inline functions from ath5k.h to base.h, as they need the
ath5k_hw definition.
Remove memory allocation for struct ath5k_hw and the corresponding error
handling. Merge iobase and ah_iobase fields.
This patch should be applied after running following commands in the
ath5k directory:
sed -i '
s/\<ath5k_softc\>/ath5k_hw/g
s/\<sc\>/ah/g
s/\<ah->ah\>/ah/g
s/\<ah->ah_sc\>/ah/g
/struct ath5k_hw \*ah = ah;/d
s/struct ath5k_hw \*ah, struct ath5k_hw \*ah/struct ath5k_hw *ah/
/^\tah = ah;/d
s/(ah, ah)/(ah)/g
/struct ath5k_hw;$/{N;s/struct ath5k_hw;\nstruct ath5k_hw;/struct ath5k_hw;/}
s/ ah / sc /
' $i *.[ch]
sed -i '/{$/{N;s/{\n$/{/}' rfkill.c
Signed-off-by: Pavel Roskin <pro...@gnu.org>
---
It's very important that both the changes made by sed and the changes in
this patch are committed at once, so that no broken revisions are
committed.
This patch is virtually guaranteed to conflict with most patches for
ath5k (as long as they contain "sc" somewhere), so it should be
committed during a quiet period when no patches are pending.
drivers/net/wireless/ath/ath5k/ath5k.h | 187 --------------------------------
drivers/net/wireless/ath/ath5k/base.c | 14 --
drivers/net/wireless/ath/ath5k/base.h | 184 +++++++++++++++++++++++++++++++
3 files changed, 183 insertions(+), 202 deletions(-)
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h
b/drivers/net/wireless/ath/ath5k/ath5k.h
index 0a46067..900d291 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -1038,124 +1038,7 @@ struct ath5k_avg_val {
#define AR5K_MAX_GPIO 10
#define AR5K_MAX_RF_BANKS 8
-/* TODO: Clean up and merge with ath5k_hw */
-struct ath5k_hw {
- struct ath_common common;
-
- struct ath5k_hw *ah_sc;
- void __iomem *ah_iobase;
-
- enum ath5k_int ah_imr;
-
- struct ieee80211_channel *ah_current_channel;
- bool ah_calibration;
- bool ah_single_chip;
-
- enum ath5k_version ah_version;
- enum ath5k_radio ah_radio;
- u32 ah_phy;
- u32 ah_mac_srev;
- u16 ah_mac_version;
- u16 ah_mac_revision;
- u16 ah_phy_revision;
- u16 ah_radio_5ghz_revision;
- u16 ah_radio_2ghz_revision;
-
-#define ah_modes ah_capabilities.cap_mode
-#define ah_ee_version ah_capabilities.cap_eeprom.ee_version
-
- u8 ah_retry_long;
- u8 ah_retry_short;
-
- u8 ah_coverage_class;
- bool ah_ack_bitrate_high;
- u8 ah_bwmode;
- bool ah_short_slot;
-
- /* Antenna Control */
- u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
- u8 ah_ant_mode;
- u8 ah_tx_ant;
- u8 ah_def_ant;
-
- struct ath5k_capabilities ah_capabilities;
-
- struct ath5k_txq_info ah_txq[AR5K_NUM_TX_QUEUES];
- u32 ah_txq_status;
- u32 ah_txq_imr_txok;
- u32 ah_txq_imr_txerr;
- u32 ah_txq_imr_txurn;
- u32 ah_txq_imr_txdesc;
- u32 ah_txq_imr_txeol;
- u32 ah_txq_imr_cbrorn;
- u32 ah_txq_imr_cbrurn;
- u32 ah_txq_imr_qtrig;
- u32 ah_txq_imr_nofrm;
- u32 ah_txq_isr;
- u32 *ah_rf_banks;
- size_t ah_rf_banks_size;
- size_t ah_rf_regs_count;
- struct ath5k_gain ah_gain;
- u8 ah_offset[AR5K_MAX_RF_BANKS];
-
-
- struct {
- /* Temporary tables used for interpolation */
- u8 tmpL[AR5K_EEPROM_N_PD_GAINS]
- [AR5K_EEPROM_POWER_TABLE_SIZE];
- u8 tmpR[AR5K_EEPROM_N_PD_GAINS]
- [AR5K_EEPROM_POWER_TABLE_SIZE];
- u8 txp_pd_table[AR5K_EEPROM_POWER_TABLE_SIZE * 2];
- u16 txp_rates_power_table[AR5K_MAX_RATES];
- u8 txp_min_idx;
- bool txp_tpc;
- /* Values in 0.25dB units */
- s16 txp_min_pwr;
- s16 txp_max_pwr;
- s16 txp_cur_pwr;
- /* Values in 0.5dB units */
- s16 txp_offset;
- s16 txp_ofdm;
- s16 txp_cck_ofdm_gainf_delta;
- /* Value in dB units */
- s16 txp_cck_ofdm_pwr_delta;
- bool txp_setup;
- } ah_txpower;
-
- struct {
- bool r_enabled;
- int r_last_alert;
- struct ieee80211_channel r_last_channel;
- } ah_radar;
-
- struct ath5k_nfcal_hist ah_nfcal_hist;
-
- /* average beacon RSSI in our BSS (used by ANI) */
- struct ewma ah_beacon_rssi_avg;
-
- /* noise floor from last periodic calibration */
- s32 ah_noise_floor;
-
- /* Calibration timestamp */
- unsigned long ah_cal_next_full;
- unsigned long ah_cal_next_ani;
- unsigned long ah_cal_next_nf;
-
- /* Calibration mask */
- u8 ah_cal_mask;
-
- /*
- * Function pointers
- */
- int (*ah_setup_tx_desc)(struct ath5k_hw *, struct ath5k_desc *,
- unsigned int, unsigned int, int, enum ath5k_pkt_type,
- unsigned int, unsigned int, unsigned int, unsigned int,
- unsigned int, unsigned int, unsigned int, unsigned int);
- int (*ah_proc_tx_desc)(struct ath5k_hw *, struct ath5k_desc *,
- struct ath5k_tx_status *);
- int (*ah_proc_rx_desc)(struct ath5k_hw *, struct ath5k_desc *,
- struct ath5k_rx_status *);
-};
+struct ath5k_hw;
struct ath_bus_ops {
enum ath_bus_type ath_bus_type;
@@ -1357,74 +1240,6 @@ int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8
txpower);
int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
u8 mode, bool fast);
-/*
- * Functions used internally
- */
-
-static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
-{
- return &ah->common;
-}
-
-static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
-{
- return &(ath5k_hw_common(ah)->regulatory);
-}
-
-#ifdef CONFIG_ATHEROS_AR231X
-#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
-
-static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
-{
- /* On AR2315 and AR2317 the PCI clock domain registers
- * are outside of the WMAC register space */
- if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
- (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
- return AR5K_AR2315_PCI_BASE + reg;
-
- return ah->ah_iobase + reg;
-}
-
-static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
-{
- return __raw_readl(ath5k_ahb_reg(ah, reg));
-}
-
-static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
-{
- __raw_writel(val, ath5k_ahb_reg(ah, reg));
-}
-
-#else
-
-static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
-{
- return ioread32(ah->ah_iobase + reg);
-}
-
-static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
-{
- iowrite32(val, ah->ah_iobase + reg);
-}
-
-#endif
-
-static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
-{
- return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
-}
-
-static inline void ath5k_read_cachesize(struct ath_common *common, int *csz)
-{
- common->bus_ops->read_cachesize(common, csz);
-}
-
-static inline bool ath5k_hw_nvram_read(struct ath5k_hw *ah, u32 off, u16 *data)
-{
- struct ath_common *common = ath5k_hw_common(ah);
- return common->bus_ops->eeprom_read(common, off, data);
-}
-
static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits)
{
u32 retval = 0, bit, i;
diff --git a/drivers/net/wireless/ath/ath5k/base.c
b/drivers/net/wireless/ath/ath5k/base.c
index 885b45b..3b6f993 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -2386,15 +2386,6 @@ ath5k_init_softc(struct ath5k_hw *ah, const struct
ath_bus_ops *bus_ops)
goto err;
}
- /* If we passed the test, malloc an ath5k_hw struct */
- ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
- if (!ah) {
- ret = -ENOMEM;
- ATH5K_ERR(ah, "out of memory\n");
- goto err_irq;
- }
-
- ah->ah_iobase = ah->iobase;
common = ath5k_hw_common(ah);
common->ops = &ath5k_common_ops;
common->bus_ops = bus_ops;
@@ -2414,7 +2405,7 @@ ath5k_init_softc(struct ath5k_hw *ah, const struct
ath_bus_ops *bus_ops)
/* Initialize device */
ret = ath5k_hw_init(ah);
if (ret)
- goto err_free_ah;
+ goto err_irq;
/* set up multi-rate retry capabilities */
if (ah->ah_version == AR5K_AR5212) {
@@ -2486,8 +2477,6 @@ ath5k_init_softc(struct ath5k_hw *ah, const struct
ath_bus_ops *bus_ops)
return 0;
err_ah:
ath5k_hw_deinit(ah);
-err_free_ah:
- kfree(ah);
err_irq:
free_irq(ah->irq, ah);
err:
@@ -2934,7 +2923,6 @@ ath5k_deinit_softc(struct ath5k_hw *ah)
* state and potentially want to use them.
*/
ath5k_hw_deinit(ah);
- kfree(ah);
free_irq(ah->irq, ah);
}
diff --git a/drivers/net/wireless/ath/ath5k/base.h
b/drivers/net/wireless/ath/ath5k/base.h
index 870bebf..d481ada 100644
--- a/drivers/net/wireless/ath/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -166,8 +166,7 @@ struct ath5k_vif {
u8 lladdr[ETH_ALEN];
};
-/* Software Carrier, keeps track of the driver state
- * associated with an instance of a device */
+/* Driver state associated with an instance of a device */
struct ath5k_hw {
struct pci_dev *pdev;
struct device *dev; /* for dma mapping */
@@ -181,7 +180,7 @@ struct ath5k_hw {
struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
enum nl80211_iftype opmode;
- struct ath5k_hw *ah; /* Atheros HW */
+ struct ath_common common;
#ifdef CONFIG_ATH5K_DEBUG
struct ath5k_dbg_info debug; /* debug info */
@@ -262,6 +261,117 @@ struct ath5k_hw {
struct delayed_work tx_complete_work;
struct survey_info survey; /* collected survey info */
+
+ enum ath5k_int ah_imr;
+
+ struct ieee80211_channel *ah_current_channel;
+ bool ah_calibration;
+ bool ah_single_chip;
+
+ enum ath5k_version ah_version;
+ enum ath5k_radio ah_radio;
+ u32 ah_phy;
+ u32 ah_mac_srev;
+ u16 ah_mac_version;
+ u16 ah_mac_revision;
+ u16 ah_phy_revision;
+ u16 ah_radio_5ghz_revision;
+ u16 ah_radio_2ghz_revision;
+
+#define ah_modes ah_capabilities.cap_mode
+#define ah_ee_version ah_capabilities.cap_eeprom.ee_version
+
+ u8 ah_retry_long;
+ u8 ah_retry_short;
+
+ u8 ah_coverage_class;
+ bool ah_ack_bitrate_high;
+ u8 ah_bwmode;
+ bool ah_short_slot;
+
+ /* Antenna Control */
+ u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
+ u8 ah_ant_mode;
+ u8 ah_tx_ant;
+ u8 ah_def_ant;
+
+ struct ath5k_capabilities ah_capabilities;
+
+ struct ath5k_txq_info ah_txq[AR5K_NUM_TX_QUEUES];
+ u32 ah_txq_status;
+ u32 ah_txq_imr_txok;
+ u32 ah_txq_imr_txerr;
+ u32 ah_txq_imr_txurn;
+ u32 ah_txq_imr_txdesc;
+ u32 ah_txq_imr_txeol;
+ u32 ah_txq_imr_cbrorn;
+ u32 ah_txq_imr_cbrurn;
+ u32 ah_txq_imr_qtrig;
+ u32 ah_txq_imr_nofrm;
+ u32 ah_txq_isr;
+ u32 *ah_rf_banks;
+ size_t ah_rf_banks_size;
+ size_t ah_rf_regs_count;
+ struct ath5k_gain ah_gain;
+ u8 ah_offset[AR5K_MAX_RF_BANKS];
+
+
+ struct {
+ /* Temporary tables used for interpolation */
+ u8 tmpL[AR5K_EEPROM_N_PD_GAINS]
+ [AR5K_EEPROM_POWER_TABLE_SIZE];
+ u8 tmpR[AR5K_EEPROM_N_PD_GAINS]
+ [AR5K_EEPROM_POWER_TABLE_SIZE];
+ u8 txp_pd_table[AR5K_EEPROM_POWER_TABLE_SIZE * 2];
+ u16 txp_rates_power_table[AR5K_MAX_RATES];
+ u8 txp_min_idx;
+ bool txp_tpc;
+ /* Values in 0.25dB units */
+ s16 txp_min_pwr;
+ s16 txp_max_pwr;
+ s16 txp_cur_pwr;
+ /* Values in 0.5dB units */
+ s16 txp_offset;
+ s16 txp_ofdm;
+ s16 txp_cck_ofdm_gainf_delta;
+ /* Value in dB units */
+ s16 txp_cck_ofdm_pwr_delta;
+ bool txp_setup;
+ } ah_txpower;
+
+ struct {
+ bool r_enabled;
+ int r_last_alert;
+ struct ieee80211_channel r_last_channel;
+ } ah_radar;
+
+ struct ath5k_nfcal_hist ah_nfcal_hist;
+
+ /* average beacon RSSI in our BSS (used by ANI) */
+ struct ewma ah_beacon_rssi_avg;
+
+ /* noise floor from last periodic calibration */
+ s32 ah_noise_floor;
+
+ /* Calibration timestamp */
+ unsigned long ah_cal_next_full;
+ unsigned long ah_cal_next_ani;
+ unsigned long ah_cal_next_nf;
+
+ /* Calibration mask */
+ u8 ah_cal_mask;
+
+ /*
+ * Function pointers
+ */
+ int (*ah_setup_tx_desc)(struct ath5k_hw *, struct ath5k_desc *,
+ unsigned int, unsigned int, int, enum ath5k_pkt_type,
+ unsigned int, unsigned int, unsigned int, unsigned int,
+ unsigned int, unsigned int, unsigned int, unsigned int);
+ int (*ah_proc_tx_desc)(struct ath5k_hw *, struct ath5k_desc *,
+ struct ath5k_tx_status *);
+ int (*ah_proc_rx_desc)(struct ath5k_hw *, struct ath5k_desc *,
+ struct ath5k_rx_status *);
};
struct ath5k_vif_iter_data {
@@ -282,4 +392,72 @@ void ath5k_vif_iter(void *data, u8 *mac, struct
ieee80211_vif *vif);
#define ath5k_hw_hasveol(_ah) \
(ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
+/*
+ * Functions used internally
+ */
+
+static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
+{
+ return &ah->common;
+}
+
+static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
+{
+ return &(ath5k_hw_common(ah)->regulatory);
+}
+
+#ifdef CONFIG_ATHEROS_AR231X
+#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
+
+static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
+{
+ /* On AR2315 and AR2317 the PCI clock domain registers
+ * are outside of the WMAC register space */
+ if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
+ (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
+ return AR5K_AR2315_PCI_BASE + reg;
+
+ return ah->iobase + reg;
+}
+
+static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
+{
+ return __raw_readl(ath5k_ahb_reg(ah, reg));
+}
+
+static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
+{
+ __raw_writel(val, ath5k_ahb_reg(ah, reg));
+}
+
+#else
+
+static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
+{
+ return ioread32(ah->iobase + reg);
+}
+
+static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
+{
+ iowrite32(val, ah->iobase + reg);
+}
+
+#endif
+
+static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
+{
+ return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
+}
+
+static inline void ath5k_read_cachesize(struct ath_common *common, int *csz)
+{
+ common->bus_ops->read_cachesize(common, csz);
+}
+
+static inline bool ath5k_hw_nvram_read(struct ath5k_hw *ah, u32 off, u16 *data)
+{
+ struct ath_common *common = ath5k_hw_common(ah);
+ return common->bus_ops->eeprom_read(common, off, data);
+}
+
#endif
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