cbemoore Wrote: 
> Read what Sean (Slim Devices CEO) has to say about I2S:
> 
> http://forums.slimdevices.com/showthread.php?p=113777&highlight=i2s#post113777

To be clear, there is nothing wrong with i2s (or its variants: left
jusified etc) when talking about a small closed chassis where noise is
controlled and you have a solid ground plane etc. It is just a
synchonous serial signal, nothing special.

I've done a great deal of experimentation with clock jitter recently
using more advanced tools, and I suspect (thought I haven't tested this
particular case yet) that the clock embdedding/recovery mechanism of
s/pdif is a red herring, at least for a well designed system with good
cables and clean power. I suspect the biggest issue is the noise in the
transceivers and on the cable itself, not some inherent sloppiness in
the manchester encoding/recovery process. If this is true, then
separating clock and data would not address this at all in EITHER case.
Only reversing the direction of the clock (by a word clock line, for
example) would address this, by confining the "important" clock to a
small domain very close to the DAC.


-- 
seanadams
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