seanadams;184848 Wrote: > Not to go too far off the deep end here, but even if the transitions > were infinitely steep and perfectly timed, it would be difficult to > extract a clean clock. Due to zeroes having one fewer transition than > ones, the receiving PLL will generate data-correlated jitter of its own > as it drifts slightly between bits. Julian Dunn's "J-Test" paper > describes how this works and how to reveal a receiver's worst-case > behavior using a special square-wave signal, which is measured after > the DAC. There are ways to minimize data correlated jitter by using an > elaborate two-stage PLL, but even then it's still an analog circuit > susceptible to noise. You could never do better than a local > oscillator.
Interesting. S/PDIF really is flawed... A question for those interested in getting as close as possible to audio perfection: it seems (for reasons discussed in this thread and many times before on this forum) that a SB or Transporter using its own DAC has a huge advantage over nearly any external DAC. Why do so few people here use it that way? It´s possible that with some very clever and complicated engineering an external DAC could overcome these problems, but why trust that it has when you have a much simpler and more elegant solution already available? -- opaqueice ------------------------------------------------------------------------ opaqueice's Profile: http://forums.slimdevices.com/member.php?userid=4234 View this thread: http://forums.slimdevices.com/showthread.php?t=33146
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