The topology is dead simple, really - in an ideal world you'd connect the clock directly to the DAC board, as close to the pin of the D/A converter chip itself as you can. The I2S SCK signal should be an output from the DAC board.
Of course, I assume that you wouldn't be undertaking to design your own equipment unless you have a fair degree of electronics expertise - so I'll leave it up to you to worry about how to ensure that the clock signal is driven between the two boards in the correct direction. In practise there's also a problem that the I2S data rate isn't the same as the clock speed that the SB requires (about 12MHz IIRC). This does mean that there has to be a clock divider or PLL somewhere in the system, and that may mean putting the super-clock on the SB board after all. In this case, using I2S is still a theoretical improvement over SPDIF, but it's not giving you the ideal minimum-jitter performance you could have if the SB were able to directly accept the I2S clock. -- AndyC_772 ------------------------------------------------------------------------ AndyC_772's Profile: http://forums.slimdevices.com/member.php?userid=10472 View this thread: http://forums.slimdevices.com/showthread.php?t=35642 _______________________________________________ audiophiles mailing list audiophiles@lists.slimdevices.com http://lists.slimdevices.com/lists/listinfo/audiophiles
