marlowe;266161 Wrote: 
> 
> So last night I enjoyed listening to 88.2 recordings from Linn. Great
> work, Sean, but perhaps something in FW40 is wrong as to "finishing up"
> the installation proces?
> 

To explain a little background on this, all products since SB2
incorporate a programmable logic chip or "CPLD", something like a FPGA.
The purpose of this part is to tie together the CPU with the DAC, to
provide selection from multiple clock sources, and to generate the
s/pdif output signal. In Transporter it additionally routes the audio
signals coming in from the s/pdif receiver and provides the special
functions such as word clock I/O and effects loop.

This chip contains flash memory which is factory programmed, but also
can be reprogrammed in the field. Changing the programming of this part
is the modern equivalent of physically rewiring a bunch of 74xxx logic
chips. Prior to TP FW40 we have never revised the logic programming, so
this is the first time we are having to reprogram it in the field.

Clearly, something is wrong with the automated reprogramming of this
part which is supposed to take place at power-on, starting with FW40.
Why it would sometimes work when pressing '1' but not automatically I
don't yet know, but some including myself and the QA team here have not
had to force it. I will look into it.

I'll enter a bug for this one but please keep an eye out for anything
else.


-- 
seanadams
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