2011/7/19 Larry Finger <[email protected]>: > On 07/19/2011 01:56 AM, Rafał Miłecki wrote: >> >> W dniu 19 lipca 2011 01:32 użytkownik Rafał Miłecki<[email protected]> >> napisał: >>> >>> Larry, for now, can you check: >>> >>> 1) When wl does set parity (0x800) bit >>> 2) Does newer wl always use 38 offset for RX header? >> >> After adding routing (translation) address, using parity bit (0x800) >> and cold booting, DMA seems to work =) > > Good to hear. I have not found anything about the offset of 38, but I have > some confusing stuff on the parity enable bit. > > One routine in the reference driver does the following: > > 1. If bit 1 is set in the DMA control flags (this bit was set to 1 in the > init) > a. Read DMA control > a. OR result with 0x800 and write to control > a. Read DMA control > a. If bit 0x800 is set > 1. Write original contents back to control > a. Otherwise > 1. Clear bit 1 in DMA control flags > > The above routine makes it look as if they have tested whether the device > implements the parity bit. The funny part is that I cannot find any other > place where they test the DMA control flags for bit 1 set. There is a spot > where they unconditionally set bit 0x800 in the DMA control, which seems to > match what you see.
The brcm80211 sources agree: <http://git.kernel.org/?p=linux/kernel/git/gregkh/staging-2.6.git;a=blob;f=drivers/staging/brcm80211/brcmsmac/dma.c;h=ea17671efb63aa0c9556c8e46c842734ba398f86;hb=refs/heads/staging-next#l1147> Regards, Jonas _______________________________________________ b43-dev mailing list [email protected] http://lists.infradead.org/mailman/listinfo/b43-dev
