On 5/1/2014 10:37 AM, Dennis Cote wrote:
> On Thursday, May 1, 2014 8:51:36 AM UTC-6, Gerald wrote:
>>
>> No. If they were connected, they could be used. They do not require the 
>> PRU to drive them.
>>
>>
> Can you explain how the hardware is setup to assign these UART pins to 
> either PRU or the CPU? 
> 
> I have been looking through the TI TRM and AM335x datasheet, and at the TI 
> Pin Mux Utility trying to figure this out. The TRM has very little to say 
> about the PRU. 
> 
> The fact that I can have the CPU drive UART0 on one set of I/O pins and the 
> PRU driving PR1_UART0 on a different set of I/O pins seems to imply that 
> UART0 is not the same peripheral as PR1_UART0. So how do I setup the 
> PR1_UART0 pins to connect to the UART0 signals? The Pin Mux Utility shows 
> them as separate peripheral interfaces.

UART0 and PR1_UART0 are totally different chunks of hardware.  Do not
get confused by the fact that they both have "UART0" in the name, they
are *NOT* the same.

You control the selection of PR1_UART0 pin functions the same way you
control any other special functions: make a device-tree overlay and load
the appropriate settings into the pinmux registers.

> It turns out that using the PRU might make sense in my application. To do 
> this I would have to abandon using the AM335x I2C peripherals and add some 
> SPI to I2C bridge parts to drive the I2C connected peripherals, but I 
> suspect that would involve a lot of custom driver development to allow 
> these bridged I2C buses to operate like the standard I2C buses. I would 
> also have to develop some kind of IPC link between the CPU and PRU.

There is an rproc interface for the PRU if that helps.  See the example
BB-BONE-PRU-0[2-4] device tree overlays.

-- 
Charles Steinkuehler
char...@steinkuehler.net

-- 
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