> On Aug 30, 2017, at 4:53 AM, Pete Turnbull via cctalk <cctalk@classiccmp.org>
> wrote:
>
> On 30/08/2017 05:29, Douglas Taylor via cctalk wrote:
>> I'll send along a picture of the rear of the back plane. I'm getting
>> the impression I can't do what I want with the old cpu cards, M7270
>> and M7264.
>> I had really hoped to be able to put together a simple system to demonstrate
>> the differences in processing power between the 11/2 cpu,
>> the 11/23 and the 11/73.
>> They are all dual width cards and it would have been simple to swap
>> them out. I think to do it I would need 2 boxes, one with a 16 bit
>> backplane and the other with a 22 bit backplane.
>
> I don't see why you couldn't do what you want with the BA11-M and a little
> work, *providing* the Emulex UC07 controller works in an LSI-1103 system -
> and the manual (on Bitsavers) suggests it should. Section 1.6.3 says "The
> UC07/08 is compatible with the Q-Bus used on all LSI-11 ... series computers."
>
> First, you'd need to undo any backplane upgrade that made it 22-bit instead
> of 18-bit. BTW, there's no such thing as a 16-bit backplane, only 18-bit and
> 22-bit. BDAL17/18 are always bussed, to allow for the use of parity, even in
> 16-bit-CPU systems such as an 11/03.
>
> The only reason you need to do this is that the KD11-H and KD11-F processors
> put other signals on those lines, which the Emulex (and other 22-bit devices)
> won't like and will interfere with.
>
> The soldering you mentioned is almost certainly the extra four bus lines for
> the upgrade. It will be on both the B and D fingers of the backplane,
> because it's a serpentine backplane with Q-Bus on both sides. Look for wired
> connections between BC1, BD1, BE1, BF1 and between DC1, DD1, DE1, DF1. Check
> there no other extra connections; sometimes people added connections for
> other signals - for example I have a backplane with the SRUN signal on extra
> slots for diagnostics and faultfinding. Also check you don't have an H9270-Q,
> which is inherently 22-bit, instead of an H9270. I've never seen one, but
> presumably they exist.
>
> See http://www.dunnington.info/public/PDP-11/QBus_chassis for a little more
> information.
Agree with Pete here. The UC07 manual includes jumper settings for an LSI
11/2, so we can assume it was supported (UC0751001H).
Provided you have an 18 bit bus which means that BC1/DC1,
BD1/DD1,BE1/DE1,BF1/DF1 are NOT bussed, the LSI 11/2,11/03 and an UC07 should
work together.
>
> Next you'd need some sort of bootstrap. What's in the custom EPROMs on you
> MXV11-AC might do. Or might not, depending on whether it uses any 11/23
> (KDF-11) specific instructions or diagnostics, and includes an MSCP
> bootstrap. The autoboot feature on the UC07 might do instead. Or might not.
> You'd have to experiment.
>
The autoboot on the UC07 uses the following instruction for the REV G firmware.
200: MOV #340,@#177776
The memory mapped register (CSR 177776) for the processor status word (PSW)
does not exist on the LSI-11.
The purpose of this is to prevent interrupts during bootstraping from the LTC
and other devices. The processor will probably halt due to non-existent memory
address.
However, a P entered in ODT will attempt to continue the bootstrap. If you
have and cannot disable the LTC, it may work intermittently, depending on
whether LTC interrupt occurs before he OS bootstrap loads. Its just a matter
of timing.
Jerry
