================
@@ -857,6 +859,13 @@ let CopyCost = -1 in // Don't allow copying of tile
registers
def TILE : RegisterClass<"X86", [x86amx], 8192,
(sequence "TMM%u", 0, 7)> {let Size = 8192;}
+// Block Scale Registers (ACE)
+let CopyCost = -1 in // Don't allow copying of BSR register
+def BSR : RegisterClass<"X86", [untyped], 0, (add BSR0)> {
----------------
mahesh-attarde wrote:
Why untype?
https://github.com/llvm/llvm-project/pull/208408
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