On Tue, Apr 14, 2009 at 7:34 PM, Kyle Sluder <kyle.slu...@gmail.com> wrote:
> On Tue, Apr 14, 2009 at 7:26 PM, Michael Ash <michael....@gmail.com> wrote:
>> That has to be the most confusing technical document I've ever seen.
>> I'm not certain, but after reading it about three times, I'm pretty
>> sure that it's discussing data alignment on IA-64 (Itanium), not
>> x86-64. Microsoft certainly thinks that x86-64 supports unaligned data
>> access, with speed penalties:
>
> EM64T == x86_64, so I'm not sure *what* Intel is trying to say.

Yeah, I know, but they refer to both, which is what's so confusing. As
far as I can tell they're talking about writing code on Itanium, and
then using the fact that your Itanium code is now 64-bit clean as an
easy jump over to EM64T. I could be wrong.

>> And a quick test confirms that my Mac Pro, at least, has no trouble
>> reading a misaligned int pointer.
>
> Could be GCC's codegen giving you a helping hand.  I don't have an
> assembler handy on this machine (except GNU as, but I don't know AT&T
> syntax) so I can't try it.

>From looking at the disassembly of my compiled test program, gcc is
only generating a single load instruction. I think. I'm not exactly an
x86-64 assembly guru.

Mike
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