On Wed, 8 Jul 2026 17:44:09 GMT, Sandhya Viswanathan <[email protected]>
wrote:
>> Jatin Bhateja has updated the pull request incrementally with one additional
>> commit since the last revision:
>>
>> Review comments resolution
>
> src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp line 5025:
>
>> 5023: // The sign-flip load is unmasked and vpternlogd applies its
>> immediate bitwise, so
>> 5024: // doubleword granularity is used uniformly across all source types
>> (it is semantically
>> 5025: // equivalent to the quadword form for double here as no mask
>> register is involved).
>
> This comment is not required. The destination element size here is 32 bit so
> we need to generate 32 bit positive saturation values and hence vpternlogd.
Removed
> src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp line 5339:
>
>> 5337: XMMRegister xtmp2,
>> KRegister ktmp1, KRegister ktmp2,
>> 5338: AddressLiteral
>> float_sign_flip, Register rscratch, int vec_enc) {
>> 5339: assert(type2aelembytes(to_elem_bt) <= 4, "");
>
> It will be good to add an assert here for avx512vl() for less than 512 bit
> vector length. Same in vector_castHF2L_evex.
Addressed
> src/hotspot/cpu/x86/x86.ad line 14731:
>
>> 14729: match(Set dst (ConvF2L (ConvHF2F src)));
>> 14730: effect(TEMP dst, KILL cr, TEMP xtmp);
>> 14731: ins_cost(50);
>
> It looks to me that even without the ins_cost(50) and other ins_cost(200)
> changes, we will still get the direct HF conversion instruction selection.
> Better to remove the ins_cost related changes in this PR.
If you permit, I would like to retain the static cost adjustments. They are
functionally harmless and act as a safeguard against cost-driven selection of
the component matcher rules, which this patch marks as high cost, during the
labeling phase.
-------------
PR Review Comment: https://git.openjdk.org/jdk/pull/30928#discussion_r3549098175
PR Review Comment: https://git.openjdk.org/jdk/pull/30928#discussion_r3549097686
PR Review Comment: https://git.openjdk.org/jdk/pull/30928#discussion_r3549093745
