Here is a patch for page size problems on ia64 and radeon. Patch by Chris Ahna:
Fixes critical page size problems on ia64 architecture. See following URL for details: https://external-lists.valinux.com/archives/linux-ia64/2001-August/002037.html Comment by [EMAIL PROTECTED]: This probably should be rewritten to be outside of the drivers themselves so that it doesn't have to be done per-driver. I'm applying this to our XFree86 for now however until I've got time to investigate doing it more generically. diff -ur xc/programs/Xserver/hw/xfree86/drivers/ati.ORIG/r128_dri.c xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c --- xc/programs/Xserver/hw/xfree86/drivers/ati.ORIG/r128_dri.c 2002-10-20 02:48:27.000000000 +0900 +++ xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c 2002-10-20 03:05:24.000000000 +0900 @@ -54,15 +54,7 @@ #include "GL/glxtokens.h" #include "sarea.h" -/* ?? HACK - for now, put this here... */ -/* ?? Alpha - this may need to be a variable to handle UP1x00 vs TITAN */ -#if defined(__alpha__) -# define DRM_PAGE_SIZE 8192 -#elif defined(__ia64__) -# define DRM_PAGE_SIZE getpagesize() -#else -# define DRM_PAGE_SIZE 4096 -#endif +static size_t r128_drm_page_size; /* Initialize the visual configs that are supported by the hardware. These are combined with the visual configs that the indirect @@ -489,11 +481,11 @@ /* Initialize the CCE ring buffer data */ info->ringStart = info->agpOffset; - info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE; + info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size; info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1; info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = DRM_PAGE_SIZE; + info->ringReadMapSize = r128_drm_page_size; /* Reserve space for vertex/indirect buffers */ info->bufStart = info->ringReadOffset + info->ringReadMapSize; @@ -642,11 +634,11 @@ /* Initialize the CCE ring buffer data */ info->ringStart = info->agpOffset; - info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE; + info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size; info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1; info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = DRM_PAGE_SIZE; + info->ringReadMapSize = r128_drm_page_size; /* Reserve space for vertex/indirect buffers */ info->bufStart = info->ringReadOffset + info->ringReadMapSize; @@ -1003,6 +993,8 @@ break; } + r128_drm_page_size = getpagesize(); + /* Create the DRI data structure, and fill it in before calling the DRIScreenInit(). */ if (!(pDRIInfo = DRICreateInfoRec())) return FALSE; diff -ur xc/programs/Xserver/hw/xfree86/drivers/ati.ORIG/radeon_dri.c xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c --- xc/programs/Xserver/hw/xfree86/drivers/ati.ORIG/radeon_dri.c 2002-10-20 02:48:27.000000000 +0900 +++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c 2002-10-20 03:04:18.000000000 +0900 @@ -56,15 +56,7 @@ #include "sarea.h" #include "radeon_sarea.h" -/* HACK - for now, put this here... */ -/* Alpha - this may need to be a variable to handle UP1x00 vs TITAN */ -#if defined(__alpha__) -# define DRM_PAGE_SIZE 8192 -#elif defined(__ia64__) -# define DRM_PAGE_SIZE getpagesize() -#else -# define DRM_PAGE_SIZE 4096 -#endif +static size_t radeon_drm_page_size; static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen); @@ -774,11 +766,11 @@ /* Initialize the CP ring buffer data */ info->ringStart = info->agpOffset; - info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE; + info->ringMapSize = info->ringSize*1024*1024 + radeon_drm_page_size; info->ringSizeLog2QW = RADEONMinBits(info->ringSize*1024*1024/8)-1; info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = DRM_PAGE_SIZE; + info->ringReadMapSize = radeon_drm_page_size; /* Reserve space for vertex/indirect buffers */ info->bufStart = info->ringReadOffset + info->ringReadMapSize; @@ -900,11 +892,11 @@ /* Initialize the CCE ring buffer data */ info->ringStart = info->agpOffset; - info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE; + info->ringMapSize = info->ringSize*1024*1024 + radeon_drm_page_size; info->ringSizeLog2QW = RADEONMinBits(info->ringSize*1024*1024/8)-1; info->ringReadOffset = info->ringStart + info->ringMapSize; - info->ringReadMapSize = DRM_PAGE_SIZE; + info->ringReadMapSize = radeon_drm_page_size; /* Reserve space for vertex/indirect buffers */ info->bufStart = info->ringReadOffset + info->ringReadMapSize; @@ -1218,6 +1210,8 @@ break; } + radeon_drm_page_size = getpagesize(); + /* Create the DRI data structure, and fill it in before calling the * DRIScreenInit(). */ -- Treasurer, GOLUM, Inc. http://www.golum.org _______________________________________________ Devel mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/devel
