On Tue, Dec 17, 2002 at 01:02:45AM +0000, Keith Whitwell wrote:
>David Dawes wrote:
>> On Mon, Dec 16, 2002 at 12:44:15PM -0500, David Dawes wrote:
>>
>>>On Sat, Dec 14, 2002 at 07:02:50PM +0100, Michel Dänzer wrote:
>>>
>>>>On Sam, 2002-12-14 at 18:42, Michel Daenzer wrote:
>>>>
>>>>>CVSROOT: /cvsroot/dri
>>>>>Module name: xc
>>>>>Repository: xc/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/
>>>>>Changes by: mdaenzer@sc8-pr-cvs1. 02/12/14 09:42:48
>>>>>
>>>>>Log message:
>>>>> merge changes from trunk since Mesa 5.0 merge
>>>>
>>>>Okay, I think that should fix the most pressing issues people think were
>>>>fixed by the Mesa 5.0 merge.
>>>
>>>Thanks for doing that!
>>>
>>>I've taken that and merged it into the XFree86 trunk. I've also merged
>>>the XFree86 trunk back into mesa-4-0-4-branch, but I'm not having much
>>>success in committing it. My first commit attempt aborted, then I
>>>couldn't connect to the CVS repository for a while, then trying again
>>>just now it's failing because there are various locks in the repository
>>
>>>from the first aborted attempt.
>>
>>>Anyway, the pre-merge tag is "mesa-4-0-4-20021214" and when I can finally
>>>finish committing the merge, the post-merge tag will be
>>>"mesa-4-0-4-20021215".
>>
>>
>> The SourceForge admins cleared the locks, and I've finshed committing
>> the merge. The part of this merge that I'm least sure of is the 2D
>> radeon driver.
>>
>> It'd be a big help if someone could take a look at the merged code and
>> let me know of any problems. I've put a diff between those before and
>> after tags at <http://www.xfree86.org/~dawes/mesa404-20021214-15.diff.gz>.
>
>First thing I notice is somebody's disabled dri on radeon 9000's (rv250's).
>Added a comment indicating that they didn't know if they were doing the right
>thing or not, which is kindof dump -- if you don't know, don't make the
>change. Or ask here, I guess.
That looks like a bad merge on my part. There are lots of conflicts
between the two versions, and the XFree86 version of this check got
through when it shouldn't have. I'll fix it.
>Also the option to turn off the depth buffer (introduced in the twc work) has
>been either knobbled or removed. This may not have been deliberate, hard to
>tell. This seems to be the second round of removing this -- or alternatly
>maybe it was only half merged to xfree in the first place. In any case it
>seems to be gone now.
I don't see an option like that on the DRI trunk either. There's a
"NoBackBuffer" option though.
>I don't know the story behind the removal of RADEONSaveFBDevRegisters() --
>seems to be related to keeping pageflipping working over an fbdev call. Can
>anyone comment on whether or not this is still necessary?
I expect that got accidentally removed. I'm also not sure if the handling
of gen_int_cntl is correct everywhere.
The attached patch should put back most of what got inadvertently removed.
David
--
David Dawes
Release Engineer/Architect The XFree86 Project
www.XFree86.org/~dawes
Index: radeon.h
===================================================================
RCS file: /home/x-cvs/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v
retrieving revision 1.33
diff -u -r1.33 radeon.h
--- radeon.h 2002/12/16 16:19:12 1.33
+++ radeon.h 2002/12/17 01:50:28
@@ -518,7 +518,6 @@
int perctx_sarea_size;
#endif
#endif
- CARD32 gen_int_cntl;
/* XVideo */
XF86VideoAdaptorPtr adaptor;
Index: radeon_dri.c
===================================================================
RCS file: /home/x-cvs/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c,v
retrieving revision 1.23
diff -u -r1.23 radeon_dri.c
--- radeon_dri.c 2002/12/16 16:19:12 1.23
+++ radeon_dri.c 2002/12/17 01:50:28
@@ -1017,7 +1017,9 @@
memset(&drmInfo, 0, sizeof(drmRadeonInit));
- if (info->ChipFamily == CHIP_FAMILY_R200)
+ if ( (info->ChipFamily == CHIP_FAMILY_R200) ||
+ (info->ChipFamily == CHIP_FAMILY_RV250) ||
+ (info->ChipFamily == CHIP_FAMILY_M9) )
drmInfo.func = DRM_RADEON_INIT_R200_CP;
else
drmInfo.func = DRM_RADEON_INIT_CP;
@@ -1148,7 +1150,7 @@
info->irq = 0;
} else {
unsigned char *RADEONMMIO = info->MMIO;
- info->gen_int_cntl = INREG( RADEON_GEN_INT_CNTL );
+ info->ModeReg.gen_int_cntl = INREG( RADEON_GEN_INT_CNTL );
}
}
@@ -1239,6 +1241,9 @@
if (info->ChipFamily == CHIP_FAMILY_R200)
pDRIInfo->clientDriverName = R200_DRIVER_NAME;
+ else if ((info->ChipFamily == CHIP_FAMILY_RV250) ||
+ (info->ChipFamily == CHIP_FAMILY_M9))
+ pDRIInfo->clientDriverName = RV250_DRIVER_NAME;
else
pDRIInfo->clientDriverName = RADEON_DRIVER_NAME;
@@ -1362,7 +1367,9 @@
if (version) {
int req_minor, req_patch;
- if (info->ChipFamily == CHIP_FAMILY_R200) {
+ if ((info->ChipFamily == CHIP_FAMILY_R200) ||
+ (info->ChipFamily == CHIP_FAMILY_RV250) ||
+ (info->ChipFamily == CHIP_FAMILY_M9)) {
req_minor = 5;
req_patch = 0;
} else {
Index: radeon_driver.c
===================================================================
RCS file: /home/x-cvs/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v
retrieving revision 1.75
diff -u -r1.75 radeon_driver.c
--- radeon_driver.c 2002/12/16 16:19:13 1.75
+++ radeon_driver.c 2002/12/17 01:50:28
@@ -3510,12 +3510,11 @@
(pScrn->displayWidth * pScrn->virtualY *
info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024);
info->directRenderingEnabled = FALSE;
- } else if (info->ChipFamily >= CHIP_FAMILY_RV250) {
- /* Is this correct or do RV250's and M9's work? */
+ } else if (info->ChipFamily >= CHIP_FAMILY_R300) {
info->directRenderingEnabled = FALSE;
xf86DrvMsg(scrnIndex, X_WARNING,
"Direct rendering not yet supported on "
- "Radeon 9000 and newer cards\n");
+ "Radeon 9700 and newer cards\n");
} else {
if (info->IsSecondary)
info->directRenderingEnabled = FALSE;
@@ -3614,6 +3613,9 @@
int bufferSize = ((pScrn->virtualY * width_bytes
+ RADEON_BUFFER_ALIGN)
& ~RADEON_BUFFER_ALIGN);
+ int depthSize = ((((pScrn->virtualY+15) & ~15) * width_bytes
+ + RADEON_BUFFER_ALIGN)
+ & ~RADEON_BUFFER_ALIGN);
int l;
int scanlines;
@@ -3645,7 +3647,7 @@
* pixmap cache. Should be enough for a fullscreen background
* image plus some leftovers.
*/
- info->textureSize = info->FbMapSize - 6 * bufferSize;
+ info->textureSize = info->FbMapSize - 5 * bufferSize - depthSize;
/* If that gives us less than half the available memory, let's
* be greedy and grab some more. Sorry, I care more about 3D
@@ -3653,22 +3655,23 @@
* framebuffer's worth of pixmap cache anyway.
*/
if (info->textureSize < (int)info->FbMapSize / 2) {
- info->textureSize = info->FbMapSize - 5 * bufferSize;
+ info->textureSize = info->FbMapSize - 4 * bufferSize - depthSize;
}
if (info->textureSize < (int)info->FbMapSize / 2) {
- info->textureSize = info->FbMapSize - 4 * bufferSize;
+ info->textureSize = info->FbMapSize - 3 * bufferSize - depthSize;
}
/* If there's still no space for textures, try without pixmap cache */
if (info->textureSize < 0) {
- info->textureSize = info->FbMapSize - 3 * bufferSize - 64/4*64;
+ info->textureSize = info->FbMapSize - 2 * bufferSize - depthSize
+ - 64/4*64;
}
/* Check to see if there is more room available after the 8192nd
scanline for textures */
- if ((int)info->FbMapSize - 8192*width_bytes - bufferSize*2
+ if ((int)info->FbMapSize - 8192*width_bytes - bufferSize - depthSize
> info->textureSize) {
info->textureSize =
- info->FbMapSize - 8192*width_bytes - bufferSize*2;
+ info->FbMapSize - 8192*width_bytes - bufferSize - depthSize;
}
/* If backbuffer is disabled, don't allocate memory for it */
@@ -3706,7 +3709,7 @@
/* Reserve space for the shared depth
* buffer.
*/
- info->depthOffset = ((info->textureOffset - bufferSize +
+ info->depthOffset = ((info->textureOffset - depthSize +
RADEON_BUFFER_ALIGN) &
~(CARD32)RADEON_BUFFER_ALIGN);
info->depthPitch = pScrn->displayWidth;
@@ -3995,6 +3998,31 @@
}
}
+/* Write miscellaneous registers which might have been destroyed by an fbdevHW
+ * call
+ */
+static void RADEONRestoreFBDevRegisters(ScrnInfoPtr pScrn,
+ RADEONSavePtr restore)
+{
+#ifdef XF86DRI
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ unsigned char *RADEONMMIO = info->MMIO;
+
+ /* Restore register for vertical blank interrupts */
+ if (info->irq) {
+ OUTREG(RADEON_GEN_INT_CNTL, restore->gen_int_cntl);
+ }
+
+ /* Restore registers for page flipping */
+ if (info->allowPageFlip) {
+ OUTREG(RADEON_CRTC_OFFSET_CNTL, restore->crtc_offset_cntl);
+ if (info->HasCRTC2) {
+ OUTREG(RADEON_CRTC2_OFFSET_CNTL, restore->crtc2_offset_cntl);
+ }
+ }
+#endif
+}
+
/* Write CRTC registers */
static void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore)
@@ -4420,6 +4448,28 @@
save->surface_cntl = INREG(RADEON_SURFACE_CNTL);
}
+/* Read miscellaneous registers which might be destroyed by an fbdevHW call */
+static void RADEONSaveFBDevRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
+{
+#ifdef XF86DRI
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ unsigned char *RADEONMMIO = info->MMIO;
+
+ /* Save register for vertical blank interrupts */
+ if (info->irq) {
+ save->gen_int_cntl = INREG(RADEON_GEN_INT_CNTL);
+ }
+
+ /* Save registers for page flipping */
+ if (info->allowPageFlip) {
+ save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL);
+ if (info->HasCRTC2) {
+ save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL);
+ }
+ }
+#endif
+}
+
/* Read CRTC registers */
static void RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
{
@@ -4697,7 +4747,6 @@
save->cap0_trig_cntl = 0;
save->cap1_trig_cntl = 0;
save->bus_cntl = info->BusCntl;
- save->gen_int_cntl = info->gen_int_cntl;
/*
* If bursts are enabled, turn on discards
* Radeon doesn't have write bursts
@@ -5397,7 +5446,11 @@
if (info->accelOn) info->accel->Sync(pScrn);
if (info->FBDev) {
+ RADEONSaveFBDevRegisters(pScrn, &info->ModeReg);
+
ret = fbdevHWSwitchMode(scrnIndex, mode, flags);
+
+ RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg);
} else {
info->IsSwitching = TRUE;
if (info->Clone && info->CloneModes) {
@@ -5571,6 +5624,8 @@
if (!fbdevHWEnterVT(scrnIndex,flags)) return FALSE;
info->PaletteSavedOnVT = FALSE;
info->ModeReg.surface_cntl = INREG(RADEON_SURFACE_CNTL);
+
+ RADEONRestoreFBDevRegisters(pScrn, &info->ModeReg);
} else
if (!RADEONModeInit(pScrn, pScrn->currentMode)) return FALSE;
@@ -5579,12 +5634,6 @@
#ifdef XF86DRI
if (info->directRenderingEnabled) {
- if (info->irq) {
- /* Need to make sure interrupts are enabled */
- unsigned char *RADEONMMIO = info->MMIO;
- OUTREG(RADEON_GEN_INT_CNTL, info->gen_int_cntl);
- }
-
RADEONCP_START(pScrn, info);
DRIUnlock(pScrn->pScreen);
}
@@ -5618,6 +5667,9 @@
if (info->FBDev) {
RADEONSavePalette(pScrn, save);
info->PaletteSavedOnVT = TRUE;
+
+ RADEONSaveFBDevRegisters(pScrn, &info->ModeReg);
+
fbdevHWLeaveVT(scrnIndex,flags);
}
