On Thu, 25 Dec 2003 20:00:48 -0800 (PST), Alex Deucher wrote:
>--- Felix Khling <[EMAIL PROTECTED]> wrote:
>> Alex Deucher <[EMAIL PROTECTED]> wrote:
>> 
>> After a brief look at the utah driver: the S3 driver is definitely
>> not
>> based on the utah-driver. They are completely different. However, the
>> register defines look very similar. There is also a BCI and the
>> primitive types and vertex formats are encoded in the same way. I
>> havn't
>> checked the 3D state registers in detail. The savage4 driver uses DMA
>> buffers to transfer commands, the savage IX driver uses the BCI. I
>> don't
>> know if the savage IX didn't have busmaster DMA capabilities, at
>> least
>> the relevant register defines are missing in the utah driver.
>
>Tim, I don't suppose you could help clarify the situation with savage3D
>vs savage4 when it comes to DMA/BCI?  I thought the BCI was a command
>processor like the CP on r128/radeon/r200, but it's been a while since
>I messed with the savage driver.

All of the Savage/ProSavage/SuperSavage chips support both
BCI-through-FIFO and BCI-through-DMA.  S3's Windows drivers use the DMA
path exclusively, because there is a bug in the Savage4 engine (which is
also in the ProSavages) that causes about 10% of the chips to lock up when
reading the FIFO status register.  This is the "scrolling hang" referred
to on my web site.  (You would think that simulations would have uncovered
a problem in the single most important register in the entire chip, but I
digress...)

I assume the Savage/IX driver uses BCI-through-FIFO because it avoids the
need for DMA kernel assistance, but the Savage4 scheme should work there
just as well.  If there is a strong desire, I could scan through the
documents and see if any of the DMA registers have different addresses,
but when I was working on the Savage Windows NT drivers, I did some
experiments and learned that DMA only bought about 10% additional
performance.
--
- Tim Roberts, [EMAIL PROTECTED]
  Providenza & Boekelheide, Inc.




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